PIC16C717_13 datasheet(9/224 Pages) MICROCHIP

Part #	PIC16C717

Description	18/20-Pin, 8-Bit CMOS Microcontrollers with 10/12-Bit A/D

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 1999-2013 Microchip Technology Inc.

DS41120C-page 9

PIC16C717/770/771

2.0

MEMORY ORGANIZATION

There are two memory blocks in each of these PIC®

microcontrollers. Each block (Program Memory and

Data Memory) has its own bus, so that concurrent

access can occur.

Additional information on device memory may be found

in the PICmicro

 Mid-Range MCU Family Reference

Manual, (DS33023).

2.1

Program Memory Organization

The PIC16C717/770/771 devices have a 13-bit pro-

gram counter capable of addressing an 8K x 14 pro-

gram memory space. The PIC16C717 and the

PIC16C770 have 2K x 14 words of program memory.

The PIC16C771 has 4K x 14 words of program mem-

ory. Accessing a location above the physically imple-

mented address will cause a wrap-around.

The RESET vector is at 0000h and the interrupt vector

is at 0004h.

FIGURE 2-1:

PROGRAM MEMORY MAP

AND STACK OF THE

PIC16C717 AND PIC16C770

FIGURE 2-2:

PROGRAM MEMORY MAP

AND STACK OF THE

PIC16C771

2.2

Data Memory Organization

The data memory is partitioned into multiple banks,

which contain the General Purpose Registers and the

Special Function Registers. Bits RP1 and RP0 are the

bank select bits.

= 00

 Bank0

= 01

 Bank1

= 10

 Bank2

= 11

 Bank3

Each bank extends up to 7Fh (128 bytes). The lower

locations of each bank are reserved for the Special

Function Registers. Above the Special Function Regis-

ters are General Purpose Registers, implemented as

static RAM. All implemented banks contain special

function registers. Some frequently used special func-

tion registers from one bank are mirrored in another

bank for code reduction and quicker access.

2.2.1

GENERAL PURPOSE REGISTER FILE

The register file can be accessed either directly, or indi-

rectly, through the File Select Register FSR.

PC<12:0>

13

0000h

0004h

0005h

Stack Level 1

Stack Level 8

RESET Vector

Interrupt Vector

On-chip

CALL, RETURN

RETFIE, RETLW

Stack Level 2

Program

Memory

Page 0

07FFh

3FFFh

RP1

RP0

(STATUS<6:5>)

PC<12:0>

13

0000h

0004h

0005h

Stack Level 1

Stack Level 8

RESET Vector

Interrupt Vector

On-chip

CALL, RETURN

RETFIE, RETLW

Stack Level 2

Program

Memory

Page 0

Page 1

07FFh

0800h

0FFFh

1000h

3FFFh

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