TUSB8040A1

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SLLSEE5A – FEBRUARY 2013 – REVISED MAY 2013

2.1

Signal Descriptions

Table 2-1. Signal Descriptions

TYPE

DESCRIPTION

I

Input

O

Output

I/O

Input/output

PD, PU

Internal pull-down/pull-up

PT

Passive pass through

P

Power Supply

G

Ground

2.2

Clock and Reset Signals

Table 2-2. Clock and Reset Signals

PIN

SIGNAL NAME

TYPE

DESCRIPTION

NO.

Global power reset. This reset brings all of the TUSB8040A1 internal registers to their default

GRSTz

I, PU

A18

states. When GRSTz is asserted, the device is completely nonfunctional. GRSTz should be

asserted a minimum of 3 ms after all power rails are valid at the device.

Crystal input. This terminal is the crystal input for the internal oscillator. The input may alternately be

XI

I

A49

driven by the output of an external oscillator. When using a crystal a 1-M

Ω feedback resistor is

required between XI and XO.

Crystal output. This terminal is crystal output for the internal oscillator. If XI is driven by an external

XO

O

A48

oscillator this pin may be left unconnected. When using a crystal a 1-M

Ω feedback resistor is

required between XI and XO.

Oscillator return. If using a crystal, the load capacitors should use this signal as the return path and

VSSOSC

I

B45

it should not be connected to the PCB ground. If using an oscillator, this terminal should be

connected to PCB Ground.

2.3

USB Upstream Signals

Table 2-3. USB Upstream Signals

SIGNAL NAME

TYPE

PIN NO.

DESCRIPTION

USB_SSTXP_UP

O

B39

USB SuperSpeed transmitter differential pair (positive)

USB_SSTXM_UP

O

A42

USB SuperSpeed transmitter differential pair (negative)

USB_SSRXP_UP

I

A44

USB SuperSpeed receiver differential pair (positive)

USB_SSRXM_UP

I

B40

USB SuperSpeed receiver differential pair (negative)

USB_DP_UP

I/O

A46

USB high-speed differential transceiver (positive)

USB_DM_UP

I/O

B42

USB high-speed differential transceiver (negative)

Precision resistor reference. A 9.09-k

Ω ±1% resistor should be connected between

USB_R1

PT

A50

USB_R1 and USB_R1RTN.

USB_R1RTN

PT

B47

Precision resistor reference return

USB upstream port power monitor. The VBUS detection requires a voltage divider. The

USB_VBUS

I

B44

signal USB_VBUS must be connected to VBUS through a 90.9-k

Ω ±1% resistor, and to

ground through a 10-k

Ω ±1% resistor from the signal to ground.

Copyright © 2013, Texas Instruments Incorporated

PIN DESCRIPTIONS

11

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