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M393B1G70BH0 Datasheet(PDF) 11 Page - Samsung semiconductor |
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M393B1G70BH0 Datasheet(HTML) 11 Page - Samsung semiconductor |
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11 / 55 page  - 11 - datasheet DDR3 SDRAM Rev. 1.5 Registered DIMM 10. Function Block Diagram: 10.1 8GB, 1Gx72 Module (Populated as 1 rank of x4 DDR3 SDRAMs) DQ[27:24] DQ[19:16] DQS8 DQS8 CB[3:0] DQS DQS DQ[3:0] D8 ZQ VSS DQS17 DQS17 CB[7:4] DQS DQS D17 ZQ VSS DM DQ[3:0] DM DQS3 DQS3 DQ[27:24] DQS DQS DQ[3:0] D3 ZQ VSS DQS12 DQS12 DQ[31:28] DQS DQS D12 ZQ VSS DM DQ[3:0] DM DQS8 DQS2 DQ[19:16] DQS DQS DQ[3:0] D2 ZQ VSS DQS11 DQS11 DQ[23:20] DQS DQS D11 ZQ VSS DM DQ[3:0] DM DQS1 DQS1 DQ[11:8] DQS DQS DQ[3:0] D1 ZQ VSS DQS10 DQS10 DQ[15:12] DQS DQS D10 ZQ VSS DM DQ[3:0] DM DQS0 DQS0 DQ[3:0] DQS DQS DQ[3:0] D0 ZQ VSS DQS9 DQS9 DQ[7:4] DQS DQS D9 ZQ VSS DM DQ[3:0] DM DQS4 DQS4 DQ[35:32] DQS DQS DQ[3:0] D4 ZQ VSS DQS13 DQS13 DQ[39:36] DQS DQS D13 ZQ VSS DM DQ[3:0] DM DQS5 DQS5 DQ[43:40] DQS DQS DQ[3:0] D5 ZQ VSS DQS14 DQS14 DQ[47:44] DQS DQS D14 ZQ VSS DM DQ[3:0] DM DQS6 DQS6 DQ[51:48] DQS DQS DQ[3:0] D6 ZQ VSS DQS15 DQS15 DQ[55:52] DQS DQS D15 ZQ VSS DM DQ[3:0] DM DQS7 DQS7 DQ[59:56] DQS DQS DQ[3:0] D7 ZQ VSS DQS16 DQS16 DQ[63:60] DQS DQS D16 ZQ VSS DM DQ[3:0] DM Vtt Vtt VSS VDD D0 - D17 VREFCA VDDSPD Serial PD VTT VREFDQ D0 - D17 D0 - D17 D0 - D17 NOTE : 1. Unless otherwise noted, resistor values are 15 5%. 2. See the wiring diagrams for all resistors associated with the command, address and control bus. 3. ZQ resistors are 240 1% . For all other resistor values refer to the appropriate wiring diagram. 1:2 R E G I S T E R S1* BA[N:0] A[N:0] RAS CAS WE CKE0 RESET** RST** : SDRAMs D[17:0] RBA[N:0]A -> BA[N:0] : SDRAMs D[3:0], D[12:8], D17 RA[N:0]A -> A[N:0] : SDRAMs D[3:0], D[12:8], D17 RRASA -> RAS : SDRAMs D[3:0], D[12:8], D17 RCASA -> CAS : SDRAMs D[3:0], D[12:8], D17 RCKE0A -> CKE0 : SDRAMs D[3:0], D[12:8], D17 PAR_IN S0* RS0A-> CS0 : SDRAMs D[3:0], D[12:8], D17 RBA[N:0]B -> BA[N:0] : SDRAMs D[7:4], D[16:13] RA[N:0]B -> A[N:0] : SDRAMs D[7:4], D[16:13] RRASB -> RAS : SDRAMs D[7:4], D[16:13] RCASB -> CAS : SDRAMs D[7:4], D[16:13] RWEA -> WE : SDRAMs D[3:0], D[12:8], D17 RWEB -> WE : SDRAMs D[7:4], D[16:13] RCKE0B -> CKE0 : SDRAMs D[7:4], D[16:13] PCK0A -> CK : SDRAMs D[3:0], D[12:8], D17 PCK0B -> CK : SDRAMs D[7:4], D[16:13] Err_out RST CK0 ODT0 RODT0A -> ODT0 : SDRAMs D[3:0], D[12:8], D17 RODT0B -> ODT0 : SDRAMs D[7:4], D[16:13] CK0 PCK0A -> CK : SDRAMs D[3:0], D[12:8], D17 PCK0B -> CK : SDRAMs D[7:4], D[16:13] RS0B-> CS0 : SDRAMs D[7:4], D[16:13] A0 Thermal sensor with SPD A1 A2 SA0 SA1 SA2 SCL SDA EVENT EVENT S[3:2] NC 120 CK1 CK1 120 |
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