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BUK964R7-80E Datasheet(PDF) 6 Page - NXP Semiconductors |
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BUK964R7-80E Datasheet(HTML) 6 Page - NXP Semiconductors |
6 / 14 page NXP Semiconductors BUK964R7-80E N-channel TrenchMOS logic level FET BUK964R7-80E All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved Product data sheet 5 October 2012 6 / 13 Symbol Parameter Conditions Min Typ Max Unit QGD gate-drain charge - 28.9 - nC Ciss input capacitance - 11500 15340 pF Coss output capacitance - 744 892 pF Crss reverse transfer capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz; Tj = 25 °C; Fig. 15 - 360 493 pF td(on) turn-on delay time - 54.2 - ns tr rise time - 95.7 - ns td(off) turn-off delay time - 112 - ns tf fall time VDS = 60 V; RL = 2.4 Ω; VGS = 5 V; RG(ext) = 5 Ω - 82.3 - ns LD internal drain inductance from upper edge of drain mounting base to center of die - 2.5 - nH LS internal source inductance from source lead to source bonding pad - 7.5 - nH Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; Fig. 16 - 0.77 1.2 V trr reverse recovery time - 49.8 - ns Qr recovered charge IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V; VDS = 25 V - 97.2 - nC 003aah919 0 80 160 240 0 1 2 3 VDS(V) ID (A) VGS(V) = 10 2.6 2.8 4.5 2.4 3 Tj = 25 °C; tp = 300 μs Fig. 6. Output characteristics; drain current as a function of drain-source voltage; typical values 003aah920 0 5 10 15 0 2.5 5 7.5 10 VGS(V) RDSon (mΩ) Fig. 7. Drain-source on-state resistance as a function of gate-source voltage; typical values |
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