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FDC602P Datasheet(PDF) 2 Page - Fairchild Semiconductor |
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FDC602P Datasheet(HTML) 2 Page - Fairchild Semiconductor |
2 / 6 page FDC602P Rev A Electrical Characteristics T A = 25°C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ID = –250 µA –12 V IDSS Zero Gate Voltage Drain Current VDS = –10 V, VGS = 0 V –1 µA IGSSF Gate–Body Leakage, Forward VGS = 12 V, VDS = 0 V 100 nA IGSSR Gate–Body Leakage, Reverse VGS = –12 V VDS = 0 V –100 nA On Characteristics (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = –250 µA –0.6 –1.5 V RDS(on) Static Drain–Source On–Resistance VGS = –4.5 V, ID = –5.5 A VGS = –2.5 V, ID = –4.4 A 0.033 0.052 Ω Drain–Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain–Source Diode Forward Current –1.3 A VSD Drain–Source Diode Forward Voltage VGS = 0 V, IS = –1.3 A (Note 2) –1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 78°C/W when mounted on a 1in 2 pad of 2oz copper on FR-4 board. b. 156°C/W when mounted on a minimum pad. 2. Pulse Test: Pulse Width ≤=300 µs, Duty Cycle ≤=2.0% |
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