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MCIMX6Q4AVT08AC Datasheet(PDF) 5 Page - Freescale Semiconductor, Inc |
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MCIMX6Q4AVT08AC Datasheet(HTML) 5 Page - Freescale Semiconductor, Inc |
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5 / 166 page  Introduction i.MX 6Dual/6Quad Automotive and Infotainment Applications Processors, Rev. 2 Freescale Semiconductor 5 • NEON MPE coprocessor — SIMD Media Processing Architecture — NEON register file with 32x64-bit general-purpose registers — NEON Integer execute pipeline (ALU, Shift, MAC) — NEON dual, single-precision floating point execute pipeline (FADD, FMUL) — NEON load/store and permute pipeline The SoC-level memory system consists of the following additional components: — Boot ROM, including HAB (96 KB) — Internal multimedia / shared, fast access RAM (OCRAM, 256 KB) — Secure/non-secure RAM (16 KB) • External memory interfaces: — 16-bit, 32-bit, and 64-bit DDR3-1066, LVDDR3-1066, and 1/2 LPDDR2-1066 channels, supporting DDR interleaving mode, for 2x32 LPDDR2-1066 — 8-bit NAND-Flash, including support for Raw MLC/SLC, 2 KB, 4 KB, and 8 KB page size, BA-NAND, PBA-NAND, LBA-NAND, OneNAND™ and others. BCH ECC up to 40 bit. — 16/32-bit NOR Flash. All EIMv2 pins are muxed on other interfaces. — 16/32-bit PSRAM, Cellular RAM Each i.MX 6Dual/6Quad processor enables the following interfaces to external devices (some of them are muxed and not available simultaneously): • Hard Disk Drives—SATA II, 3.0 Gbps • Displays—Total five interfaces available. Total raw pixel rate of all interfaces is up to 450 Mpixels/sec, 24 bpp. Up to four interfaces may be active in parallel. — One Parallel 24-bit display port, up to 225 Mpixels/sec (for example, WUXGA at 60 Hz or dual HD1080 and WXGA at 60 Hz) — LVDS serial ports—One port up to 165 Mpixels/sec or two ports up to 85 MP/sec (for example, WUXGA at 60 Hz) each — HDMI 1.4 port — MIPI/DSI, two lanes at 1 Gbps • Camera sensors: — Parallel Camera port (up to 20 bit and up to 240 MHz peak) — MIPI CSI-2 serial camera port, supporting up to 1000 Mbps/lane in 1/2/3-lane mode and up to 800 Mbps/lane in 4-lane mode. The CSI-2 Receiver core can manage one clock lane and up to four data lanes. Each i.MX 6Dual/6Quad processor has four lanes. • Expansion cards: — Four MMC/SD/SDIO card ports all supporting: – 1-bit or 4-bit transfer mode specifications for SD and SDIO cards up to UHS-I SDR-104 mode (104 MB/s max) – 1-bit, 4-bit, or 8-bit transfer mode specifications for MMC cards up to 52 MHz in both SDR and DDR modes (104 MB/s max) |
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