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UPD78F9500MA-CAC-A Datasheet(PDF) 10 Page - Renesas Technology Corp |
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UPD78F9500MA-CAC-A Datasheet(HTML) 10 Page - Renesas Technology Corp |
10 / 342 page User’s Manual U18172EJ3V0UD 8 CONTENTS CHAPTER 1 OVERVIEW.........................................................................................................................14 1.1 Features .........................................................................................................................................14 1.2 Ordering Information....................................................................................................................15 1.3 Pin Configuration (Top View) ......................................................................................................16 1.3.1 μPD78F920x .....................................................................................................................................16 1.3.2 μPD78F950x .....................................................................................................................................16 1.4 78K0S/Kx1+ Product Lineup........................................................................................................17 1.5 Block Diagram...............................................................................................................................18 1.5.1 μPD78F920x .....................................................................................................................................18 1.5.2 μPD78F950x .....................................................................................................................................19 1.6 Functional Outline ........................................................................................................................20 CHAPTER 2 PIN FUNCTIONS ...............................................................................................................21 2.1 Pin Function List...........................................................................................................................21 2.1.1 μPD78F920x .....................................................................................................................................21 2.1.2 μPD78F950x .....................................................................................................................................23 2.2 Pin Functions ................................................................................................................................24 2.2.1 P20 to P23 (Port 2)............................................................................................................................24 2.2.2 P32 and P34 (Port 3).........................................................................................................................25 2.2.3 P40 and P43 (Port 4).........................................................................................................................25 2.2.4 RESET ..............................................................................................................................................25 2.2.5 X1 and X2 ( μPD78F920x) .................................................................................................................25 2.2.6 EXCLK ( μPD78F950x) ......................................................................................................................26 2.2.7 VDD ....................................................................................................................................................26 2.2.8 VSS ....................................................................................................................................................26 2.3 Pin I/O Circuits and Connection of Unused Pins ......................................................................27 CHAPTER 3 CPU ARCHITECTURE ......................................................................................................29 3.1 Memory Space ..............................................................................................................................29 3.1.1 Internal program memory space........................................................................................................32 3.1.2 Internal data memory space ..............................................................................................................33 3.1.3 Special function register (SFR) area..................................................................................................33 3.1.4 Data memory addressing ..................................................................................................................33 3.2 Processor Registers.....................................................................................................................36 3.2.1 Control registers ................................................................................................................................36 3.2.2 General-purpose registers.................................................................................................................39 3.2.3 Special function registers (SFRs) ......................................................................................................40 3.3 Instruction Address Addressing.................................................................................................44 3.3.1 Relative addressing ...........................................................................................................................44 3.3.2 Immediate addressing .......................................................................................................................45 3.3.3 Table indirect addressing ..................................................................................................................45 |
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