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HCPL-M456 Datasheet(PDF) 6 Page - AVAGO TECHNOLOGIES LIMITED |
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HCPL-M456 Datasheet(HTML) 6 Page - AVAGO TECHNOLOGIES LIMITED |
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6 / 14 page  6 Switching Specifications (RL= 20 k :) Over recommended operating conditions unless otherwise specified: TA = -40° C to +100° C, VCC = +4.5 V to 30 V, IF(on) = 10 mA to 20 mA, VF(off) = -5 V to 0.8 V Parameter Symbol Min. Typ.* Max. Units Test Conditions Fig. Note Propagation Delay Time to Low Output Level tPHL 30 200 400 ns CL = 100 pF IF(on) = 10 mA, VF(off) = 0.8 V, VCC = 15.0 V, VTHLH = 2.0 V, VTHHL = 1.5 V 6, 8-12 8, 9 100 ns CL = 10 pF Propagation Delay Time to High Output Level tPLH 270 400 550 ns CL = 100 pF 130 CL = 10 pF Pulse Width Distortion PWD 200 450 ns CL = 100 pF 13 Propagation Delay Difference Between Any 2 Parts tPLH-tPHL -150 200 450 ns 10 Output High Level Common Mode Transient Immunity |CMH| 15 30 kV/ PsIF = 0 mA, VO > 3.0 V VCC = 15.0 V, CL = 100 pF, VCM = 1500 VP-P, TA= 25° C 711 Output Low Level Common Mode Transient Immunity |CML|15 30 kV/ PsIF = 10 mA, VO < 1.0 V 12 *All typical values at 25° C, VCC = 15 V. Notes: 1. Derate linearly above 90° C free-air temperature at a rate of 0.8 mA/°C. 2. Derate linearly above 90° C free-air temperature at a rate of 1.6 mA/°C. 3. Derate linearly above 90° C free-air temperature at a rate of 3.0 mW/°C. 4. Derate linearly above 90° C free-air temperature at a rate of 4.2 mW/°C. 5. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current (IO) to the forward LED input current (IF) times 100. 6. Device considered a two-terminal device: Pins 1 and 3 shorted together and Pins 4, 5 and 6 shorted together. 7. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 VRMS for 1 second (leakage detection current limit, II-O ≤ 5 PA). 8. Pulse: f = 20 kHz, Duty Cycle = 10%. 9. Use of a 0.1 PF bypass capacitor connected between pins 4 and 6 can improve performance by filtering power supply line noise. 10. The difference between tPLH and tPHL between any two parts under the same test condition. (See IPM Dead Time and Propagation Delay Specifications section.) 11. Common mode transient immunity in a Logic High level is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 3.0V). 12. Common mode transient immunity in a Logic Low level is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the output will remain in a Logic Low state (i.e., VO < 1.0V). 13. Pulse Width Distortion (PWD) is defined as |tPHL - tPLH| for any given device. |
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Similar Description - HCPL-M456 |
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