MAX2021

High-Dynamic-Range, Direct Up-/Downconversion

650MHz to 1200MHz Quadrature Mod/Demod

11

Maxim Integrated

Detailed Description

The MAX2021 is designed for upconverting differential

in-phase (I) and quadrature (Q) inputs from baseband

to a 650MHz to 1200MHz RF frequency range. The

device can also be used as a demodulator, downcon-

verting an RF input signal directly to baseband.

Applications include RFID handheld and portal readers,

as well as single and multicarrier GSM/EDGE,

cdma2000, WCDMA, and iDEN base stations. Direct

conversion architectures are advantageous since they

significantly reduce transmitter or receiver cost, part

count, and power consumption as compared to tradition-

al IF-based double conversion systems.

The MAX2021 integrates internal baluns, an LO buffer, a

phase splitter, two LO driver amplifiers, two matched

double-balanced passive mixers, and a wideband

quadrature combiner. The MAX2021’s high-linearity mix-

ers, in conjunction with the part’s precise in-phase and

quadrature channel matching, enable the device to pos-

sess excellent dynamic range, ACLR, 1dB compression

point, and LO and sideband suppression characteris-

tics. These features make the MAX2021 ideal for four-

carrier WCDMA operation.

LO Input Balun, LO Buffer, and

Phase Splitter

The MAX2021 requires a single-ended LO input, with a

nominal power of 0dBm. An internal low-loss balun at

the LO input converts the single-ended LO signal to a

differential signal at the LO buffer input. In addition, the

internal balun matches the buffer’s input impedance to

50Ω over the entire band of operation.

The output of the LO buffer goes through a phase split-

ter, which generates a second LO signal that is shifted

by 90° with respect to the original. The 0° and 90° LO

signals drive the I and Q mixers, respectively.

LO Driver

Following the phase splitter, the 0° and 90° LO signals

are each amplified by a two-stage amplifier to drive the

I and Q mixers. The amplifier boosts the level of the LO

Pin Description

PIN

NAME

FUNCTION

1, 5, 9–12, 14, 16–19, 22,

24, 27–30, 32, 34–36

GND

Ground

2

RBIASLO3 3rd LO Amplifier Bias. Connect a 332

resistor to ground.

3

VCCLOA

LO Input Buffer Amplifier Supply Voltage. Bypass to GND with 33pF and 0.1µF

capacitors as close as possible to the pin.

4

LO

Local Oscillator Input. 50

input impedance. Requires a DC-blocking capacitor.

6

RBIASLO1 1st LO Input Buffer Amplifier Bias. Connect a 432

resistor to ground.

7

N.C.

No Connection. Leave unconnected.

8

RBIASLO2 2nd LO Amplifier Bias. Connect a 619

resistor to ground.

13

VCCLOI1

I-Channel 1st LO Amplifier Supply Voltage. Bypass to GND with 33pF and 0.1µF

capacitors as close as possible to the pin.

15

VCCLOI2

I-Channel 2nd LO Amplifier Supply Voltage. Bypass to GND with 33pF and 0.1µF

capacitors as close as possible to the pin.

20

BBI+

Baseband In-Phase Noninverting Port

21

BBI-

Baseband In-Phase Inverting Port

23

RF

RF Port. This port is matched to 50 . Requires a DC-blocking capacitor.

25

BBQ-

Baseband Quadrature Inverting Port

26

BBQ+

Baseband Quadrature Noninverting Port

31

VCCLOQ2

Q-Channel 2nd LO Amplifier Supply Voltage. Bypass to GND with 33pF and 0.1µF

capacitors as close as possible to the pin.

33

VCCLOQ1

Q-Channel 1st LO Amplifier Supply Voltage. Bypass to GND with 33pF and 0.1µF

capacitors as close as possible to the pin.

EP

GND

Exposed Ground Pad. The exposed pad MUST be soldered to the ground plane using

multiple vias.