Electronic Components Datasheet Search |
|
BR24G02FVJ-3 Datasheet(PDF) 4 Page - Rohm |
|
BR24G02FVJ-3 Datasheet(HTML) 4 Page - Rohm |
4 / 36 page Datasheet 4/33 BR24G02-3 TSZ02201-0R2R0G100170-1-2 29.Mar.2013 Rev.003 ©2013 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 www.rohm.com Block Diagram Figure 3. Block Diagram Pin Configuration (TOP VIEW) Pin Descriptions Terminal Name Input/ Output Descriptions A0 Input Slave address setting* A1 Input Slave address setting* A2 Input Slave address setting* GND - Reference voltage of all input / output, 0V SDA Input/ output Serial data input serial data output SCL Input Serial clock input WP Input Write protect terminal VCC - Connect the power source. *A0,A1 and A2 are not allowed to use as open. 8bit 8 7 6 5 4 3 2 1 SDA SCL WP VCC GND A2 A1 A0 Address Decoder Word Address Register Data Register Control Circuit High Voltage Generating Circuit Power Source Voltage Detection 8bit ACK START STOP 2 5 6 VCC SCL GND BR24G02-3 1 3 4 7 8 WP SDA A2 A1 A0 2kbit EEPROM Array |
Similar Part No. - BR24G02FVJ-3 |
|
Similar Description - BR24G02FVJ-3 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |