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TB28F200B5T80 Datasheet(PDF) 4 Page - Intel Corporation |
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TB28F200B5T80 Datasheet(HTML) 4 Page - Intel Corporation |
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4 / 44 page  28F200B5, 28F004/400B5, 28F800B5 E 4 PRELIMINARY REVISION HISTORY Number Description -001 Original Version -002 Minor changes throughout document. Section 3.1.5 and Figure 14 redone to clarify program/erase operation abort. Information added to Table 2, Figure 1, and Section 3.3 to clarify WP# on 8-Mbit, 44-PSOP. Read and Write Waveforms changed to numbered format. Typical numbers removed from DC Characteristics and Erase/Program Timings. -003 Minor text changes throughout document. Figure 1, 44-PSOP pinout: mistake on pin 3 on 2-Mbit pinout corrected from A17 to NC. Specs tEHQZ and tGHQZ improved. Explanations of program/erase abort commands reworked in Table 6, Command Codes. -004 Specifications for 28F004B5 40-TSOP version added; Erase suspend text and flowchart updated for clarity (Section 3.2.5.1, Table 6, Figure 10) -005 Added TE28F004B5 product offerings to ordering information chart. Added 55 ns speed capability for 2- and 4-Mbit devices. Revised ICCD max value. Name of document changed from Smart 5 Boot Block Flash Memory Family 2, 4, 8 Mbit. -006 Added automotive temperature product offerings. -007 Modified document to show new 8-Mbit, 80 ns automotive temperature product offerings. |
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