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74ACTQ843SPC Datasheet(PDF) 4 Page - Fairchild Semiconductor

Part No. 74ACTQ843SPC
Description  Quiet Seriesa™ 9-Bit Transparent Latch with 3-STATE Outputs
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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4
DC Electrical Characteristics (Continued)
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: DIP package.
Note 5: Max number of outputs defined as (n). Data inputs are driven 0V to 3V. One output @ GND.
Note 6: Max number of data inputs (n) switching. (n
− 1) inputs switching 0V to 3V. Input-under-test switching:
3V to threshold (VILD), 0V to threshold (VIHD), f = 1 MHz.
AC Electrical Characteristics
Note 7: Voltage Range 5.0 is 5.0V
±0.5V.
Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs within the same packaged device.
The specification applies to any outputs switching in the same direction, either HIGH to LOW (tOSHL) or LOW to HIGH (tOSLH). Parameter guaranteed by
design. Not tested.
VCC
TA = +25°C
TA = −40°C to +85°C
Symbol
Parameter
(V)
CL = 50 pF
CL = 50 pF
Units
(Note 7)
Min
Typ
Max
Min
Max
tPLH
Propagation Delay
5.0
2.5
6.2
9.5
2.0
10.0
ns
Dn to On
tPHL
Propagation Delay
5.0
2.5
6.7
9.5
2.0
10.0
ns
Dn to On
tPLH
Propagation Delay
5.0
2.5
7.1
9.0
2.0
10.0
ns
LE to On
tPHL
Propagation Delay
5.0
2.5
6.9
9.0
2.0
10.0
ns
LE to On
tPLH
Propagation Delay
5.0
2.5
7.3
10.0
2.0
11.0
ns
PRE to On
tPHL
Propagation Delay
5.0
2.5
7.2
11.0
2.0
12.0
ns
CLR to On
tPZH
Output Enable Time
5.0
2.5
7.2
9.5
2.0
10.5
ns
OE to On
tPZL
Output Enable Time
5.0
2.5
7.5
9.5
2.0
10.5
ns
OE to On
tPHZ
Output Disable Time
5.0
1.5
5.0
8.0
1.0
8.5
ns
OE to On
tPLZ
Output Disable Time
5.0
1.5
5.1
8.0
1.0
8.5
ns
OE to On
tPHL
Propagation Delay
5.0
2.5
6.7
10.0
2.0
11.0
ns
PRE to On
tPLH
Propagation Delay
5.0
2.5
7.3
11.0
2.0
12.0
ns
CLR to On
tOSLH
Output to Output Skew (Note 8)
5.0
0.5
1.5
1.5
ns
tOSHL
Dn to On




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