XC7SET86_1

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 01 — 7 September 2009

6 of 11

NXP Semiconductors

XC7SET86

2-input EXCLUSIVE-OR gate

12. Waveforms

Measurement points are given in Table 9.

Fig 5.

The input (A and B) to output (Y) propagation delays

mna041

A, B input

Y output

Table 9.

Measurement points

Type

Input

Output

XC7SET86

GND to 3.0 V

1.5 V

0.5

Test data is given in Table 10. Definitions for test circuit:

Fig 6.

Load circuitry for switching times

VI

VO

mna034

DUT

CL

50 pF

RT

PULSE

GENERATOR

Table 10.

Test data

Type

Input

Load

Test

XC7SET86

3.0 V

≤ 3.0 ns

15 pF, 50 pF