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74ACT652 Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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74ACT652 Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 8 page © 2000 Fairchild Semiconductor Corporation DS500310 www.fairchildsemi.com August 1999 Revised September 2000 74ACT652 Transceiver/Register General Description The ACT652 consists of bus transceiver circuits with D- type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to the HIGH logic level. Output Enable pins (OEAB, OEBA) are provided to control the transceiver function. Features s Independent registers for A and B buses s Multiplexed real-time and stored data s Outputs source/sink 24 mA s TTL-compatible inputs Ordering Code: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols IEEE/IEC Connection Diagram Pin Descriptions FACT is a trademark of Fairchild Semiconductor Corporation. Order Number Package Number Package Description 74ACT652SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74ACT652MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ACT652SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Pin Names Description A0–A7, B0–B7 A and B Inputs/3-STATE Outputs CPAB, CPBA Clock Inputs SAB, SBA Select Inputs OEAB, OEBA Output Enable Inputs |
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