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74ACT273SJ Datasheet(PDF) 2 Page - Fairchild Semiconductor |
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74ACT273SJ Datasheet(HTML) 2 Page - Fairchild Semiconductor |
2 / 10 page www.fairchildsemi.com 2 Connection Diagram Logic Symbols IEEE/IEC Pin Descriptions Mode Select-Function Table H HIGH Voltage Level L LOW Voltage Level X Immaterial LOW-to-HIGH Transition Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Pin Names Description D0–D7 Data Inputs MR Master Reset CP Clock Pulse Input Q0–Q7 Data Outputs Operating Mode Inputs Outputs MR CP Dn Qn Reset (Clear) L X X L Load ‘1' H HH Load ‘0' H LL |
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