©2003 Fairchild Semiconductor Corporation

www.fairchildsemi.com

FOD3120 Rev. 1.17.0

6

Switching Characteristics

unless otherwise specified.

Notes:

1. Maximum pulse width = 10µs, maximum duty cycle = 1.1%

2. Derate linearly above 87°C, free air temperature at a rate of 0.77mW/°C

3. No derating required across temperature range.

4. Functional operation under these conditions is not implied. Permanent damage may occur if the device is

subjected to conditions outside these ratings.

5. Device is considered a two terminal device: Pins 2 and 3 are shorted together and Pins 5, 6, 7 and 8 are shorted

together.

8. Common mode transient immunity at output high is the maximum tolerable negative dVcm/dt on the trailing edge of

9. Common mode transient immunity at output low is the maximum tolerable positive dVcm/dt on the leading edge of

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Units

Propagation Delay Time to Logic

Low Output

Rg = 10

Ω, Cg =10nF,

f = 10kHz, Duty Cycle = 50%

150

275

400

ns

Propagation Delay Time to Logic

High Output

150

255

400

ns

PWD

Pulse Width Distortion,

20

100

ns

PDD

(Skew)

Propagation Delay Difference

Between Any Two Parts or

(7)

-250

250

ns

Output Rise Time (10% – 90%)

60

ns

Output Fall Time (90% – 10%)

60

ns

UVLO Turn On Delay

1.6

µs

0.4

µs

Common Mode Transient

Immunity at Output High

(8)

35

50

kV/µs

Common Mode Transient

Immunity at Output Low

(9)

35

50

kV/µs