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MMFT3055EL Datasheet(PDF) 7 Page - Motorola, Inc |
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MMFT3055EL Datasheet(HTML) 7 Page - Motorola, Inc |
7 / 10 page MMFT3055EL 7 Motorola TMOS Power MOSFET Transistor Device Data INFORMATION FOR USING THE SOT–223 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. SOT–223 0.079 2.0 0.15 3.8 0.248 6.3 0.079 2.0 0.059 1.5 0.059 1.5 0.059 1.5 0.091 2.3 0.091 2.3 mm inches SOT–223 POWER DISSIPATION The power dissipation of the SOT–223 is a function of the drain pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, R θJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA. Using the values provided on the data sheet for the SOT–223 package, PD can be calculated as follows: PD = TJ(max) – TA R θJA The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 800 milliwatts. PD = 150 °C – 25°C 156 °C/W = 800 milliwatts The 156 °C/W for the SOT–223 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 800 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT–223 package. One is to increase the area of the drain pad. By increasing the area of the drain pad, the power dissipation can be increased. Although one can almost double the power dissipation with this method, one will be giving up area on the printed circuit board which can defeat the purpose of using surface mount technology. A graph of R θJA versus drain pad area is shown in Figure 17. ° A, Area (square inches) 0.0 0.2 0.4 0.6 0.8 1.0 160 140 120 100 80 Figure 17. Thermal Resistance versus Drain Pad Area for the SOT–223 Package (Typical) Board Material = 0.0625 ″ G–10/FR–4, 2 oz Copper TA = 25°C 0.8 Watts 1.25 Watts* 1.5 Watts *Mounted on the DPAK footprint Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad ™. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. |
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