MC68HC912DG128C datasheet(10/478 Pages) FREESCALE

Part #	MC68HC912DG128C

Description	Upward compatible with M68HC11 instruction set

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Manufacturer	FREESCALE [Freescale Semiconductor, Inc]

Direct Link	http://www.freescale.com

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10 / 478 page

Table of Contents

Technical Data

MC68HC912DT128A — Rev 4.0

10

Table of Contents

MOTOROLA

9.8

Programming EEDIVH and EEDIVL Registers. . . . . . . . . . . . 135

Section 10. Resets and Interrupts

10.1

Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137

10.2

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137

10.3

Exception Priority . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138

10.4

Maskable interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138

10.5

Latching of Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139

10.6

Interrupt Control and Priority Registers . . . . . . . . . . . . . . . . . 141

10.7

Interrupt test registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142

10.8

Resets. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143

10.9

Effects of Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145

10.10 Register Stacking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147

Section 11. I/O Ports with Key Wake-up

11.1

Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149

11.2

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149

11.3

Key Wake-up and port Registers . . . . . . . . . . . . . . . . . . . . . . 150

11.4

Key Wake-Up Input Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154

Section 12. Clock Functions

12.1

Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157

12.2

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157

12.3

Clock Sources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158

12.4

Phase-Locked Loop (PLL) . . . . . . . . . . . . . . . . . . . . . . . . . . . 159

12.5

Acquisition and Tracking Modes. . . . . . . . . . . . . . . . . . . . . . . 161

12.6

Limp-Home and Fast STOP Recovery modes . . . . . . . . . . . . 163

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