© 2000 Fairchild Semiconductor Corporation

DS009884

www.fairchildsemi.com

July 1988

Revised August 2000

100350

Low Power Hex D-Type Latch

General Description

The 100350 contains six D-type latches with true and com-

and a common Master Reset (MR). A Q output follows its D

(or both) are HIGH, a latch stores the last valid data

input overrides all other inputs and makes the Q outputs

LOW. All inputs have 50 k

Ω pull-down resistors.

Features

s 20% power reduction of the 100150

s 2000V ESD protection

s Pin/function compatible with 100150

s Voltage compensated operating range

= −4.2V to −5.7V

Ordering Code:

Devises also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

Pin Descriptions

Connection Diagrams

24-Pin DIP

28-Pin PLCC

Order Number

Package Number

Package Description

100350PC

N24E

24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide

100350QC

V28A

28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square

Pin Names

Description

Data Inputs

Common Enable Inputs (Active LOW)

MR

Asynchronous Master Reset Input

Data Outputs

Complementary Data Outputs