© 2000 Fairchild Semiconductor Corporation

DS010584

www.fairchildsemi.com

August 1989

Revised August 2000

100336

Low Power 4-Stage Counter/Shift Register

General Description

The 100336 operates as either a modulo-16 up/down

counter or as a 4-bit bidirectional shift register. Three

shown in the Function Select table. Two Count Enable

(CEP, CET) inputs are provided for ease of cascading in

multistage counters. One Count Enable (CET) input also

counting operations the Terminal Count (TC) output goes

LOW when the counter reaches 15 in the count/up mode or

0 (zero) in the count/down mode. In the shift modes, the TC

tion from one stage to the next higher stage serves as the

link for multistage counting or shift-up operation. The indi-

or to preset the counter in programmable counter applica-

tions. A HIGH signal on the Master Reset (MR) input over-

rides all other inputs and asynchronously clears the flip-

flops. In addition, a synchronous clear is provided, as well

as a complement function which synchronously inverts the

contents of the flip-flops. All inputs have 50 k

Ω pull-down

resistors.

Features

s 40% power reduction of the 100136

s 2000V ESD protection

s Pin/function compatible with 100136

s Voltage compensated operating range

= −4.2V to −5.7V

s Available to industrial grade temperature range

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagrams

24-Pin DIP/SOIC

28-Pin PLCC

Logic Symbol

Order Number

Package Number

Package Description

100336SC

M24B

24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

100336PC

N24E

24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide

100336QC

V28A

28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square

100336QI

V28A

28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square

Industrial Temperature Range (

−40°C to +85°C)