Data Sheet

LG1600FXH Clock and Data Regenerator

August 1999

10

Lucent Technologies Inc.

Test Circuit

12-3234(F)r.6

Notes:

CDR, which has an internal resistor that sets a minimum bandwidth. The recommended value is 140

Ω for optimal jitter transfer performance.

The outputs may be either ac coupled, as indicated, or dc terminated into 50

Ω. In the first case, good output return loss can be obtained. The

latter configuration provides a 0 mV to –800 mV output swing for easy interface to dc-coupled circuits.

Figure 10. LG1600FXH Typical Test Circuit

500 k

Ω

+

VCO

Q

D

31

26

D

FREQ. &

PHASE

DETECT.

0°

90°

LOOP CONTROL &

SIGNAL DETECT

11

14

9

7

LOS

51

48

55

60

65

0.047

µF

0.047

µF

0.047

µF

0.047

µF

1 k

Ω

50

Ω

25 k

Ω

50

Ω

25 k

Ω

1 k

Ω

43

38

35

0.047

µF

50

Ω

50

Ω

DATA

GENERATOR

OPTIONAL

THRESHOLD

CONTROL

ALTERNATIVE

50

Ω

50

Ω

OPTIONAL

5.2 V

+

OPTIONAL

50

Ω

50

Ω

OPTIONAL

(SEE TEXT)

Ω

REQUIRED

0.047

µF

10 k

Ω

5 V

+