Agere Systems Inc.

5

Data Sheet

April 2001

BRF1A, BRF2A, BRS2B, BRR1A, and BRT1A

Quad Differential Receivers

12-2251.b(F)

Figure 4. Receiver Propagation Delay Timing

12-253.b(F)

* E2 = 1 while E1 changes state.

† E1 = 0 while E2 changes state.

Figure 5. Receiver Enable and Disable Timing

Test Conditions

Parametric values specified under the Electrical Characteristics and Timing Characteristics sections for the data

transmission driver devices are measured with the following output load circuits.

12-2249(F)

* Includes probe and jig capacitances.

Note: All 458E, IN4148, or equivalent diodes.

Figure 6. Receiver Propagation Delay Test Circuit

INPUT

OUTPUT

INPUT

80%

20%

3.7 V

3.2 V

2.7 V

1.5 V

80%

20%

∆V = 0.5 V

∆V = 0.5 V

∆V = 0.5 V

∆V = 0.5 V

E1*

OUTPUT

3 V

1.5 V

0 V

3 V

1.5 V

0 V

TO OUTPUT OF

DEVICE UNDER

TEST

15 pF*

5 k

Ω

2 k

Ω

5 V