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CT2579 Datasheet(PDF) 5 Page - Aeroflex Circuit Technology |
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CT2579 Datasheet(HTML) 5 Page - Aeroflex Circuit Technology |
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5 / 41 page  5 APPLICATION NOTE #108 Released 9/98 DATA0-15 16 bit bidirectional data highway access to internal RAM and registers. When in 8 bit mode only DATA 0-7 are used. Data inputs / outputs are inverted when the Multibus interface is selected. NACK After a write / read cycle has begun, this signal indicates that the write / read operation to the unit has been acknowledged and that access has been granted. Read data is available and write data is complete. The user can complete the write / read cycle. “0" = Cycle is acknowledged, access granted. “1" = No acknowledge, wait. NEMPTY Empty flag for the Command / Status FIFO memory which can store up to 32 command words (RT) or 32 status words (BC). In RT mode the memory will store all command words that have accessed the main RAM. This includes all standard commands to receive and transmit data from the main RAM and mode codes with data that require subsystem involvement ie. Synchronize With Data and Transmit Vector Word. In BC mode all status responses are stored in this memory. Access to this memory is gained by reading from address 0 00 00. "0" output to this pin means the FIFO is empty (no words). "1" output to this pin means the FIFO is NOT empty (has words to be read). NFULL Full flag for the Command / Status FIFO memory. When the signal goes low the memoryis full and will not store any more data. NRES Bidirectional reset pin. Interface to this pin should be in the form of an open collector pull down driver. The unit will be reset when a low level input is asserted on power up. The pin is bidirectional in that the unit will drive the signal out low after the status response of the mode code Reset Remote Terminal. Upon reset the unit will initialise to RT mode and will be able to respond immediately after the rising edge of NRES. T0-15 16 bit bidirectional data highway access to internal RAM and registers. When in 8 bit mode only DATA 0-7 are used. Data inputs / outputs are inverted when the Multibus interface is selected. Allows the user to have access to the MIL-STD-1553 bus traffic in real time. The user can utilize this bus for message illegalization and read words such as Synch w/Data directly off the T0-15 bus. Utilizing NDATA signal, the user can read the data words off the T0-15 bus as the DMA burst is transferring the data into RAM. UB Upper byte: When the unit is in 8 bit mode this signal is used as the LSB of the address lines. In 16 bit mode the signal is not used and the LSB of the address lines is ADIN 0. NRD VME Mode Data Strobe for a data transfer 0 = Read/Write data 1 = Tri-state the Data 0-15 bus Multibus Mode:Read strobe for a data transfer 0 = Read data FROM the unit TO the Subsystem 1 = Tri-state the Data0-15 bus NWR VME Mode Read/Write direction flag for a NRD data strobe 0 = Write data FROM Subsystem TO the Device 1 = Read data FROM Device unit TO the Subsystem |
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