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ACT-SF128K32N-39P1I Datasheet(PDF) 5 Page - Aeroflex Circuit Technology |
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ACT-SF128K32N-39P1I Datasheet(HTML) 5 Page - Aeroflex Circuit Technology |
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5 / 10 page  Aeroflex Circuit Technology SCD3850 REV A 5/20/98 Plainview NY (516) 694-6700 5 Flash AC Characteristics – Read Only Operations (Vcc = 5.0V, Vss = 0V, TC = -55°C to +125°C) Parameter Symbol JEDEC Stand’d –60 Min Max –70 Min Max –90 Min Max Units Read Cycle Time tAVAV tRC 60 70 90 ns Address Access Time tAVQV tACC 60 70 90 ns Chip Enable Access Time tELQV tCE 60 70 90 ns Output Enable to Output Valid tGLQV tOE 30 35 40 ns Chip Enable to Output High Z (1) tEHQZ tDF 20 20 25 ns Output Enable High to Output High Z(1) tGHQZ tDF 20 20 25 ns Output Hold from Address, CE or OE Change, Whichever is First tAXQX tOH 0 0 0 ns Note 1. Guaranteed by design, but not tested Flash AC Characteristics – Write/Erase/Program Operations, FWE Controlled (Vcc = 5.0V, Vss = 0V, TC = -55°C to +125°C) Parameter Symbol JEDEC Stand’d –60 Min Max –70 Min Max –90 Min Max Units Write Cycle Time tAVAC tWC 60 70 90 ns Chip Enable Setup Time tELWL tCE 0 0 0 ns Write Enable Pulse Width tWLWH tWP 30 35 45 ns Address Setup Time tAVWL tAS 0 0 0 ns Data Setup Time tDVWH tDS 30 30 45 ns Data Hold Time tWHDX tDH 0 0 0 ns Address Hold Time tWLAX tAH 45 45 45 ns Chip Enable Hold Time tWHEH tCH 0 0 0 ns Write Enable Pulse Width High tWHWL tWPH 20 20 20 ns Duration of Byte Programming Operation tWHWH1 14 TYP 14 TYP 14 TYP µs Sector Erase Time tWHWH2 60 60 60 Sec Chip Erase Time tWHWH3 120 120 120 Sec Read Recovery Time before Write tGHWL 0 0 0 µs Vcc Setup Time tVCE 50 50 50 µs Output Enable Setup Time tOES 12.5 12.5 12.5 Sec Output Enable Hold Time1 tOEH 10 10 10 ns Note: 1. For Toggle and Data Polling. Flash AC Characteristics – Write/Erase/Program Operations, FCE Controlled (Vcc = 5.0V, Vss = 0V, TC = -55°C to +125°C) Parameter Symbol JEDEC Stand’d –60 Min Max –70 Min Max –90 Min Max Units Write Cycle Time tAVAC tWC 60 70 90 ns Write Enable Setup Time tWLEL tWS 0 0 0 ns Chip Enable Pulse Width tELEH tCP 35 35 50 ns Address Setup Time tAVEL tAS 0 0 0 ns Data Setup Time tDVEH tDS 30 30 50 ns Data Hold Time tEHDX tDH 0 0 0 ns Address Hold Time tELAX tAH 45 45 50 ns Write Enable Hold from Write Enable High tEHWH tWH 0 0 0 ns Chip Enable Pulse Width High tEHEL tCPH 20 20 20 ns Duration of Byte Programming tWHWH1 14 TYP 14 TYP 14 TYP µs Sector Erase Time tWHWH2 60 60 60 Sec Chip Erase Time tWHWH3 120 120 120 Sec Read Recovery Time tGHEL 0 0 0 ns Chip Programming Time 12.5 12.5 12.5 Sec |
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