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LTP5900 Datasheet(PDF) 8 Page - Linear Technology |
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LTP5900 Datasheet(HTML) 8 Page - Linear Technology |
8 / 21 page 8 Dust Networks LTP5900 Mote Datasheet Figure 1 LTP5900 Package with Pin Labels 6.0 Power Supply Design Care should be taken in cases where the mote inputs will be driven to logic level high. Refer to the 040-0067 SmartMesh IA- 510 Mote Serial API Guide for information on mote bring-up and power cycling. 7.0 Mote Boot Up 7.1 Power-on Sequence The LTP5900 has internal power-on reset circuits that ensure that the mote will properly boot. External resetting of the device is not required and not recommended. Table 9 Power-on Sequence Parameter Min Typ Max Units Comments RST ¯¯¯ pulse width 125 µs Reset timing 7.2 Inrush Current During power on, the mote can be modeled as a lumped impedance, as shown in Figure 2. With a source impedance (Rsrc) of 1 Ω, the inrush current on the mote appears as shown in Figure 3. |
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