Electronic Components Datasheet Search |
|
LTC4070 Datasheet(PDF) 11 Page - Linear Technology |
|
LTC4070 Datasheet(HTML) 11 Page - Linear Technology |
11 / 20 page LTC3330 11 3330p For more information www.linear.com/LTC3330 OUT0,OUT1,OUT2(Pins30,31,32):VOUTVoltageSelect Bits. Tie high to VIN3 or low to GND to select the desired VOUT (see Table 1). Do not float. pin FuncTions GND (Exposed Pad Pin 11): Ground. The exposed pad must be connected to a continuous ground plane on the second layer of the printed circuit board by several vias directly under the LTC3330. block DiagraM 3330 BD BANDGAP REFERENCE INTERNAL RAIL GENERATION PRIORITZER UVLO UVLO_SET SLEEP VIN VREF AC1 20V 10 8 AC2 BAT 9 16 EH_ON SLEEP ILIM_SET VREF PGVOUT PGLDO 29 28 27 – + – + SLEEP 0.9*VREF VREF – + – + 0.925*VREF CAP 11 SW VIN2 GND 33 SWA SWB LDO_IN VOUT 15 14 13 21 LDO_OUT SCAP BAL 20 1 2 VIN3 26 BUCK-BOOST CONTROL ILIM_SET UVLO_SET 12 3 3 3 32, 31, 30 22, 23, 24 4 4, 5, 6, 7 UV[3:0] 3 19, 18, 17 IPK[2:0] OUT[2:0] LDO[2:0] BUCK CONTROL LDO_EN 25 – + |
Similar Part No. - LTC4070 |
|
Similar Description - LTC4070 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |