REV. A

–7–

SSM2167

The bandwidth of the SSM2167 is quite wide at all gain settings.

The upper 3 dB point is over 1 MHz at gains as high as 30 dB.

The GBW plots are shown in TPC 3. The lower 3 dB cutoff

frequency of the SSM2167 is set by the input impedance of

the VCA (1 k

Ω) and C2. While the noise of the input buffer is

fixed, the input-referred noise of the VCA is a function of gain.

The VCA input noise is designed to be a minimum when the

gain is at a maximum, thereby maximizing the usable dynamic

range of the part.

Level Detector

The SSM2167 incorporates a full-wave rectifier and a patent-

pending, true rms level detector circuit whose averaging time

the AVG CAP pin (Pin 8). For optimal low-frequency operation

of the level detector down to 10 Hz, the value of the capacitor

should be 2.2

µF. Some experimentation with larger values

low-frequency ambient background noise. The value of the aver-

aging capacitor affects sound quality: too small a value for this

capacitor may cause a “pumping effect” for some signals, while

too large a value can result in slow response times to signal

dynamics. Electrolytic capacitors are recommended here for

lowest cost and should be in the range of 2

µF to 22 µF.

The rms detector filter time constant is approximately given by

10

µF. This time constant

controls both the steady state averaging in the rms detector as

well as the release time for compression; that is, the time it takes

for the system gain to increase due to a decrease in input signal.

The attack time, the time it takes for the gain to be reduced

because of a sudden increase in input level, is controlled mainly by

internal circuitry that speeds up the attack for large level changes.

This limits overload time to less than 1 ms in most cases.

The performance of the rms level detector is illustrated in TPC 12

µF and TPC 11 for a C

µF. In each of

these photographs, the input signal to the SSM2167 (not shown) is

a series of tone bursts in six successive 10 dB steps. The tone bursts

range from –66 dBV (0.5 mV rms) to –6 dBV (0.5 V rms). As

illustrated in the photographs, the attack time of the rms level

input signal step size. The rate of release is approximately 240 dB/s

Control Circuitry

The output of the rms level detector is a signal proportional to

the log of the true rms value of the buffer output with an added

dc offset. The control circuitry subtracts a dc voltage from this

signal, scales it, and sends the result to the VCA to control the

gain. The VCA’s gain control is logarithmic—a linear change in

control signal causes a dB change in gain. It is this control law

that allows linear processing of the log rms signal to provide the

flat compression characteristic on the input/output characteristic

shown in Figure 1.

INPUT – dB

15:1

5:1

2:1

1:1

1

1

VCA GAIN

Figure 4. Effect of Varying the Compression Ratio

Setting the Compression Ratio

Changing the scaling of the control signal fed to the VCA causes a

change in the circuit’s compression ratio, “r.” This effect is shown

sion ratios as indicated in Table I. AGC performance is achieved

with compression ratios between 2:1 and 10:1, and is dependent

setting the compression equal to 1:1. If using a compression resis-

tor, using a value greater than 5 k

Ω is recommend. If lower than

5 k

Ω is used, the device may interpret this as a short, 0 Ω.

Table I. Setting Compression Ratio

Compression Ratio

1:1

0

Ω (short to V+)

2:1

15 k

Ω

3:1

35 k

Ω

5:1

75 k

Ω

10:1

175 k

Ω

VCA GAIN

INPUT – dB

1

1

r:1

Figure 5. Effects of Varying the Downward Expansion

(Noise Gate) Threshold