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SSM2160P Datasheet(PDF) 2 Page - Analog Devices |
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SSM2160P Datasheet(HTML) 2 Page - Analog Devices |
2 / 16 page –2– REV. 0 SSM2160/SSM2161–SPECIFICATIONS (VS = 6 V, TA = +25 C, AV = 0 dB, fAUDIO = 1 kHz, fCLOCK = 250 kHz, RL = 10 k , unless otherwise noted) Parameter Symbol Conditions Min Typ Max Units AUDIO PERFORMANCE Noise floor NFL VIN = GND, BW= 20 kHz, AV = 0 dB 1 –90 dBu Total Harmonic Distortion + Noise THD+N 2nd & 3rd Harmonics Only, VOUT = 0 dBu 2 AV = 0 dB 0.01 0.035 % Channel Separation Any Channel to Another 80 dB Dynamic Range NFL to Clip Point 100 dB ANALOG INPUT Maximum Level VIN max VS = ± 10 V 1.8 V rms Impedance ZIN Any Channel 10 k Ω ANALOG OUTPUT Maximum Level 3 VS = ±10 V, All Conditions of Master Attenuation and Channel Gain 1.8 V rms Impedance ZOUT 10 Ω Offset Voltage 20 mV Minimum Resistive Load RL min 10 k Ω Maximum Capacitive Load CL max 50 pF MASTER ATTENUATOR ERROR Measured from Best Fit of All Channels from 0 dB and –127 dB (or Noise Floor) AV = 0 dB Channel Gain = 0 dB ±0.5 dB AV = –20 dB Channel Gain = 0 dB ±1.0 dB AV = –40 dB Channel Gain = 0 dB ±2.0 dB AV = –60 dB Channel Gain = 0 dB ±2.5 dB CHANNEL MATCHING ±1.0 dB CHANNEL GAIN ERROR Master Attenuation = 0 dB AV = 0 dB ±0.5 dB AV = +10 dB ±1.0 dB AV = +31 dB ±2.0 dB MUTE ATTENUATION VIN = 0 dBu –95 dB VOLTAGE REFERENCE VREF Accuracy Percent of (V +) +(V –) 2 ±5% Output Impedance 5 Ω CONTROL LOGIC Logic Thresholds High (1) Re: DGND 2.0 V Low (0) 0.8 V Input Current ±1 µA Clock Frequency 1 1000 kHz Timing Characteristics See Timing Diagrams POWER SUPPLIES Voltage Range SSM2160 VS Single Supply +10 +20 V SSM2161 +8.5 +20 V SSM2160 V+, V– Dual Supply ± 5 ±10 V SSM2161 ±4.25 ±10 V Supply Current No Load 20 28 mA NOTES 1Master = 0 dB; Channel = 0 dB. 2Input level adjusted accordingly. 0 dBu = 0.775 V rms. 3For other than ±10 V supplies, maximum is V S/4. Specifications subject to change without notice. |
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