Electronic Components Datasheet Search |
|
TPS54339DDAR Datasheet(PDF) 5 Page - Texas Instruments |
|
|
TPS54339DDAR Datasheet(HTML) 5 Page - Texas Instruments |
5 / 21 page SW VBST EN VFB GND VO 7 5 1 VIN VIN VREG5 EN Logic SW PGND Protection Logic Ref SS UVLO UVLO Softstart SS REF TSD Ref VREG5 4 SS 2 VIN Ceramic Capacitor 6 SGND PGND 8 3 OV +25% OV SGND PWM Control Logic 1 Shot VREG5 XCON VREG5 OCP TPS54339 www.ti.com SLVSBT2 – JANUARY 2013 PIN FUNCTIONS (continued) PIN DESCRIPTION NAME NO. 5.5 V power supply output. A capacitor (typical 0.47 µF) should be connected to GND. VREG5 is not active VREG5 6 when EN is low. EN 7 Enable input control. EN is active high and must be pulled up to enable the device. SS 8 Soft-start control. An external capacitor should be connected to GND. Exposed Thermal pad of the package. Must be soldered to achieve appropriate dissipation. Must be connected to Back side Thermal Pad GND. FUNCTIONAL BLOCK DIAGRAM Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: TPS54339 |
Similar Part No. - TPS54339DDAR |
|
Similar Description - TPS54339DDAR |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |