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LM25019 Datasheet(PDF) 2 Page - Texas Instruments |
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LM25019 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 18 page SW BST VCC FB 8 7 6 5 1 2 3 4 UVLO RON RTN VIN LLP-8 Exp Pad UVLO 3 RON 4 RTN 1 VIN 2 8 SW 7 BST 6 VCC 5 FB PSOP-8 Exp Pad LM25019 SNVS952 – DECEMBER 2012 www.ti.com Connection Diagram Figure 1. Top View (Connect Exposed Pad to RTN) Figure 2. Top View (Connect Exposed Pad to RTN) Pin Functions Table 1. Pin Descriptions Pin Name Description Application Information 1 RTN Ground Ground connection of the integrated circuit. 2 VIN Input Voltage Operating input range is 9V to 48V. 3 UVLO Input Pin of Undervoltage Comparator Resistor divider from VIN to UVLO to GND programs the undervoltage detection threshold. An internal current source is enabled when UVLO is above 1.225V to provide hysteresis. When UVLO pin is pulled below 0.66V externally, the parts goes in shutdown mode. 4 RON On-Time Control A resistor between this pin and VIN sets the switch on- time as a function of VIN. Minimum recommended on- time is 100ns at max input voltage. 5 FB Feedback This pin is connected to the inverting input of the internal regulation comparator. The regulation level is 1.225V. 6 VCC Output From the Internal High Voltage Series Pass The internal VCC regulator provides bias supply for the Regulator. Regulated at 7.6V gate drivers and other internal circuitry. A 1.0 μF decoupling capacitor is recommended. 7 BST Bootstrap Capacitor An external capacitor is required between the BST and SW pins (0.01 μF ceramic). The BST pin capacitor is charged by the VCC regulator through an internal diode when the SW pin is low. 8 SW Switching Node Power switching node. Connect to the output inductor and bootstrap capacitor. EP Exposed Pad Exposed pad must be connected to RTN pin. Connect to system ground plane on application board for reduced thermal resistance. These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 2 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links: LM25019 |
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