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ADSP-2141L Datasheet(PDF) 1 Page - Analog Devices |
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ADSP-2141L Datasheet(HTML) 1 Page - Analog Devices |
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1 / 39 page  REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a ADSP-2141L One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2000 DSP APPLICATIONS Security Coprocessor for High Speed Networking Prod- ucts (Routers, Switches, Hubs) Cryptographic Core for Firewalls, Hardware Encryptors, and More Crypto Peripheral for Implementing Secure NIC Adapt- ers (10/100 Ethernet, Token Ring, ISDN) Secure Modem-on-a-Chip (V.34, ADSL) FEATURES DES CRYPTO BLOCK 640 Mbps Sustained Performance—Single DES 214 Mbps Sustained Performance—Triple DES Supports All Modes: ECB; CBC; 64-Bit OFB; and 1-, 8-, 64-Bit CFB. Includes Automatic Padding Implements IPsec ESP Transforms Autonomously at OC-3 (155 Mbps) Rates (3-DES, SHA-1) HASH BLOCK Hardware-Based SHA-1 and MD-5 Hashing 253 Mbps Sustained Performance—SHA-1 315 Mbps Sustained Performance—MD-5 Implements IPsec AH and HMAC Transforms SECURE KERNEL CONTROL Tamper-Resistant Isolation of Cryptographic Functions Enforces Security Perimeter Around Crypto Functions and Crypto Storage Locations Anticloning Protection Secure Algorithm Download SafeNet CGX LIBRARY On-Chip SafeNet CGX Crypto Library with Flexible CGX API Includes Chained and Parallel Execution Commands Such as Hash-and-Encrypt Embodied as 32K Words (32K 24) Kernel Program Mask-Programmed into On-Chip ROM On-Chip Protected 4K 16 Security Scratchpad RAM RANDOM NUMBER GENERATOR Hardware-Based Nondeterministic Random Number Generator Generates Internal Session Keys That Are Never Exposed Outside of the SafeNet DSP Redundant Fail-Safe Design Up to 1.3 Mbits of Random Data Available per Second FUNCTIONAL BLOCK DIAGRAM BUS_MODE IDMA MODE PCI MODE IDMA BUS INTERRUPTS FLAGS SPORT 0 SERIAL PORTS SPORT 1 PROTECTED KERNEL RAM (4K 16) 32 EXTERNAL MEMORY INTERFACE RNG BLOCK PUBLIC KEY ACCELERATOR 32-BITS DATA 26-BITS ADDR LASER VARIABLE STORE SERIAL EEPROM INTERFACE INTERRUPT CONTROLLER APPLICATION REGISTERS RAM/ROM PF7/ INT_H DMA-32 CONTROLLER IDMA INTERFACE 16 PCI OR CARDBUS INTERFACE 32 16 BUS_MODE BUS_SEL 16- OR 32-BIT BUS KERNEL MODE CONTROL KERNEL ROM 32K 24 PROG ROM 16K 24 DATA ROM 16K 16 TIMER ADSP-218x DSP CORE EMI BUS ENCRYPT BLOCK (DES, 3-DES) HASH BLOCK (MD-5, SHA-1) SafeNet is a registered trademark of Information Resource Engineering (IRE). R |
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