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KTPFPGMEVMEUG Datasheet(PDF) 5 Page - Freescale Semiconductor, Inc

Part # KTPFPGMEVMEUG
Description  KITPFPGMEVME Programmer for PF Series Devices
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

KTPFPGMEVMEUG Datasheet(HTML) 5 Page - Freescale Semiconductor, Inc

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KTPFPGMEVMEUG, Rev. 2.0
Freescale Semiconductor
5
Software and Hardware Requirements
The KITPFPGMEVME incorporates a MC9S908JM60 8-bit MCU, a MAX686 boost regulator, and a MIC5202 LDO.
The programming voltage is supplied by the boost regulator, which boosts the nominal 5.0V from the USB port to
the required 8.25V.
The programmer is connected to the customer’s board via a flat cable with a standard 8-pin (4x2), 100mil pitch
header plug. Figure 3 shows the pin-out and signals of the Programming Interface connector.
VPGM
V3V3
GND
SDA
SCL
PWRON
VUSB
ID
D+
D-
GND
1
2
3
4
5
PROGRAMMING
INTERFACE
6
1
2
3
4
5
MINI-USB
INTERFACE
BOOST
LDO
MCU
+3.3V
+8.25V
+3.5V to 5.5V
VIN
BSTEN
GND
VOUT
GND
GND
VIN
VOUT
SHDN
PGMEN
D-
SCL
SDA
PWRON
VDD
D+
CONNECTED
PROGON
3V3EN
VINSNS
EN
FB
VUSBEN
S1
S2
UP
DN
BSTDN
BSTUP
DACOUT
7
8
GPIO1
GPIO2
GPIO1
GPIO2
Figure 3. KITPFPGMEVME Block Diagram
4.1
Designing the Target PF0100 Application
When connecting the KITPFPGMEVME programmer to an application board with an i.MX processor and PF0100
sharing the I2C bus, it is required to disconnect the processor I2C lines from the communication bus.
Figure 4 shows a simplified diagram to be able to program the PF0100 with the KITPFPGMEVME programmer.
Since programming the OTP fuse on the PF0100 is a one-time event during production, the most simple and
cost-effective solution for isolating the processor I2C lines is to add two 0
Ω resistors (R5 and R6) which should
not be placed during OTP programming, but are soldered down for normal operation. Note that Figure 4 represents
only a recommended configuration; It is the customer’s responsibility to make sure this proposal meets the
requirements of a specific application.
PWRON pin is configured to be LOW so the processor will be in reset, since the PORB pin in typical application
is connected to the RESETBMCU pin of PF0100.
Note: ICTEST should be grounded.


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