NCP1337

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11

Soxyless

The “Valley point detection” is based on the observation

of the Power MOSFET Drain voltage variations. When the

transformer is fully demagnetized, the Drain voltage

is governed by the resonating energy transfer between the

on the Drain. These voltage oscillations create current

oscillation in the parasitic capacitor across the switching

MOSFET (modelized by the Crss capacitance between

Gate and Drain): a negative current (flowing out of DRV

pin) takes place during the decreasing part of the Drain

oscillation, and a positive current (entering into the DRV

pin) during the increasing part.

The Drain valley corresponds to the inversion of the

current (i.e., the zero crossing): by detecting this point, we

always ensure a true valley turn−on.

Lprim

Crss

DRV

Isoxy

Vswitch

t

Figure 6. Soxyless Concept

The current in the Power MOSFET gate is:

Igate = Vringing/Zc (with Zc the capacitance impedance)

so

Igate = Vringing

S (2 S p S Fres S Crss)

The magnitude of this gate current depends on the

MOSFET, the resonating frequency and the voltage swing

present on the Drain at the end of the plateau voltage.

Tswing + 0.5 Fres + p *Lp * Cdrain

(eq. 1)

Drain. This capacitance includes the snubber capacitor if

any, the transformer windings stray capacitance plus the

Internal Feedback Circuitry

To simplify the implementation of a primary regulation,

it is necessary to inject a current into the FB pin (instead of

sourcing it out). But to have a precise primary regulation,

the voltage present on FB pin must be regulated. Figure 8

gives the FB pin internal implementation: the circuitry

combines the functions of a current to voltage converter

and a voltage regulator.

FB

+

-

+

3 V

Vdd

Internal

Setpoint

20 kHz

Low−pass Filter

Figure 7. Internal Implementation of FB Pin