AD9760AR50 datasheet(2/23 Pages) AD

Part #	AD9760AR50

Description	10-Bit, 125 MSPS TxDAC D/A Converter

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Manufacturer	AD [Analog Devices]

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DC SPECIFICATIONS

Parameter

Min

Typ

Max

Units

RESOLUTION

10

Bits

DC ACCURACY

1

Integral Linearity Error (INL)

–1.0

±0.5

+1.0

LSB

Differential Nonlinearity (DNL)

–0.5

±0.25

+0.5

LSB

MONOTONICITY

Guaranteed Over Specified Temperature Range

ANALOG OUTPUT

Offset Error

–0.025

+0.025

% of FSR

Gain Error (Without Internal Reference)

–10

±2

+10

% of FSR

Gain Error (With Internal Reference)

–10

±1

+10

% of FSR

Full-Scale Output Current

2

2.0

20.0

mA

Output Compliance Range

–1.0

1.25

V

Output Resistance

100

k

Ω

Output Capacitance

5

pF

REFERENCE OUTPUT

Reference Voltage

1.08

1.20

1.32

V

Reference Output Current

3

100

nA

REFERENCE INPUT

Input Compliance Range

0.1

1.25

V

Reference Input Resistance

1

M

Ω

Small Signal Bandwidth (w/o CCOMP1)

4

1.4

MHz

TEMPERATURE COEFFICIENTS

Offset Drift

0

ppm of FSR/

°C

Gain Drift (Without Internal Reference)

±50

ppm of FSR/

°C

Gain Drift (With Internal Reference)

±100

ppm of FSR/

°C

Reference Voltage Drift

±50

ppm/

°C

POWER SUPPLY

Supply Voltages

AVDD5

2.7

5.0

5.5

V

DVDD

2.7

5.0

5.5

V

Analog Supply Current (IAVDD)25

30

mA

Digital Supply Current (IDVDD)

6

35

mA

Supply Current Sleep Mode (IAVDD)

8.5

mA

Power Dissipation

6 (5 V, I

OUTFS = 20 mA)

140

175

mW

Power Dissipation7 (5 V, IOUTFS = 20 mA)

190

mW

Power Dissipation

7 (3 V, I

OUTFS = 2 mA)

45

mW

Power Supply Rejection Ratio—AVDD

–0.04

+0.04

% of FSR/V

Power Supply Rejection Ratio—DVDD

–0.025

+0.025

% of FSR/V

OPERATING RANGE

–40

+85

°C

NOTES

1Measured at I

OUTA, driving a virtual ground.

2Nominal full-scale current, I

OUTFS, is 32

× the IREF current.

3Use an external buffer amplifier to drive any external load.

4Reference bandwidth is a function of external cap at COMP1 pin and signal level. Refer to Figure 41.

5For operation below 3 V, it is recommended that the output current be reduced to 12 mA or less to maintain optimum performance.

6Measured at f

CLOCK = 50 MSPS and fOUT = 1.0 MHz.

7Measured as unbuffered voltage output into 50

Ω RLOAD at IOUTA and IOUTB, fCLOCK = 100 MSPS and fOUT = 40 MHz.

Specifications subject to change without notice.

(TMIN to TMAX , AVDD = +5 V, DVDD = +5 V, IOUTFS = 20 mA, unless otherwise noted)

–2–

REV. B

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