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EDJ1108EJBG-JS-F Datasheet(PDF) 9 Page - Elpida Memory |
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EDJ1108EJBG-JS-F Datasheet(HTML) 9 Page - Elpida Memory |
9 / 32 page EDJ1108EJBG, EDJ1116EJBG Preliminary Data Sheet E1949E11 (Ver. 1.1) 9 Figure 2: Measurement Setup and Test Load for IDD and IDDQ Measurements Figure 3: Correlation from Simulated Channel I/O Power to Actual Channel I/O Power Supported by IDDQ Measurement IDD IDDQ VDDQ/2 DDR3 SDRAM VDD VDDQ VSS VSSQ CKE /CS /RAS, /CAS, /WE Address, BA ODT ZQ RTT = 25 Ω /RESET CK, /CK DQS, /DQS, DQ, DM, TDQS, /TDQS Application specific memory channel environment Channel I/O power simulation Channel I/O power number Correction Correlation IDDQ measurement IDDQ simulation IDDQ Test load |
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