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MM74HC125MTC Datasheet(PDF) 5 Page - Fairchild Semiconductor |
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MM74HC125MTC Datasheet(HTML) 5 Page - Fairchild Semiconductor |
5 / 10 page ©1983 Fairchild Semiconductor Corporation www.fairchildsemi.com MM74HC125, MM74HC126 Rev. 1.3.0 5 AC Electrical Characteristics VCC = 5V, TA = 25°C, CL = 45pF, tr = tf = 6ns AC Electrical Characteristics VCC = 2.0V to 6.0V, CL = 50pF, tr = tf = 6ns (unless otherwise specified) Note: 4. CPD determines the no load dynamic power consumption, PD = CPD VCC 2f + I CC VCC, and the no load dynamic current consumption, IS = CPD VCC f + ICC. Symbol Parameter Conditions Typ. Guaranteed Limit Units tPHL, tPLH Maximum Propagation Delay Time 13 18 ns tPZH Maximum Output Enable Time to HIGH Level RL = 1kΩ 13 25 ns tPHZ Maximum Output Disable Time from HIGH Level RL = 1kΩ, CL = 5pF 17 25 ns tPZL Maximum Output Enable Time to LOW Level RL = 1kΩ 18 25 ns tPLZ Maximum Output Disable Time from LOW Level RL = 1kΩ, CL = 5pF 13 25 ns Symbol Parameter VCC (V) Conditions TA = 25°C TA = –40°C to 85°C TA = –40°C to 125°C Units Typ. Guaranteed Limits tPHL, tPLH Maximum Propagation Delay Time 2.0 40 100 125 150 ns 4.5 14 20 25 30 6.0 12 17 21 25 tPLH, tPHL Maximum Propagation Delay Time 2.0 CL = 150pF 35 130 163 195 ns 4.5 14 26 33 39 6.0 12 22 28 39 tPZH, tPZL Maximum Output Enable Time 2.0 RL = 1kΩ 25 125 156 188 ns 4.5 14 25 31 38 6.0 12 21 26 31 tPHZ, tPLZ Maximum Output Disable Time 2.0 RL = 1kΩ 25 125 156 188 ns 4.5 14 25 31 38 6.0 12 21 26 31 tPZL, tPZH Maximum Output Enable Time 2.0 CL = 150pF, RL = 1kΩ 35 140 175 210 ns 4.5 15 28 35 42 6.0 13 24 30 36 tTLH, tTHL Maximum Output Rise and Fall Time 2.0V CL = 50pF 30 60 75 90 ns 4.5V 7 12 15 18 6.0V 6 10 13 15 CIN Input Capacitance 5 10 10 10 pF COUT Output Capacitance Outputs 15 20 20 20 pF CPD Power Dissipation Capacitance (per gate)(4) Enabled 45 pF Disabled 6 |
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