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AD780BR-REEL7 Datasheet(PDF) 7 Page - Analog Devices |
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AD780BR-REEL7 Datasheet(HTML) 7 Page - Analog Devices |
7 / 10 page AD780 REV. B –7– TURN-ON TIME The time required for the output voltage to reach its final value within a specified error band is defined as the turn-on settling time. The two major factors that affect this are the active circuit settling time and the time for the thermal gradients on the chip to stabilize. Typical settling performance is shown in Figure 11 following. The AD780 settles to within 0.1% of its final value within 10 µs. 2.499V 2.498V 2.500V 0V 5V 10 s/DIV VIN VOUT Figure 11. Turn-On Settling Time Performance DYNAMIC PERFORMANCE The output stage of the AD780 has been designed to provide superior static and dynamic load regulation. Figure 12 shows the performance of the AD780 while driving a 0 mA to 10 mA load. +VIN VOUT AD780 VL 0V VOUT 249 1 F Figure 12a. Transient Resistive Load Test Circuit 10mA 0mA 10 s/DIV ILOAD VOUT (CL = 0pF) Figure 12b. Settling Under Transient Resistive Load The dynamic load may be resistive and capacitive. For example the load may be connected via a long capacitive cable. Figure 13 following shows the performance of the AD780 driving a 1000 pF, 0 mA to 10 mA load. +VIN VOUT AD780 VL 0V VOUT 249 1 F CL 1000pF Figure 13a. Capacitive Load Transient Response Test Circuit 10 s/DIV 0mA 10mA ILOAD VOUT (CL = 1000pF) Figure 13b. Settling Under Dynamic Capacitive Load |
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