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AD7450ARM Datasheet(PDF) 10 Page - Analog Devices |
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AD7450ARM Datasheet(HTML) 10 Page - Analog Devices |
10 / 24 page REV. PrJ PRELIMINARY TECHNICAL DATA –10– AD7450 TPC 13 shows the change in Zero Code Error versus the Reference Voltage for VDD = 5V and 3.3V. -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 0.25 0.75 1.25 1.75 2.25 VREF 2.5 VDD = 5 V Fs = 1MSPS VDD = 3.3 V Fs = 833kSPS TPC 13. Change in Zero Code Error vs Reference Voltage VDD = 5V and 3.3 V* TPC 14 shows a histogram plot for 10000 conversions of a dc input using the AD7450 with VDD = 5V. Both ana- log inputs were set to VREF, which is the center of the code transition. 0 1000 2000 3000 4000 5000 6000 7000 8000 9000 10000 2044 2045 2046 2047 2048 2049 CODE 10000 Codes TPC 14. Histogram of 10000 conversions of a DC Input with VDD = 5V TPC 15 shows a histogram plot for 10000 conversions of a dc input for VDD of 3V. As in TPC 14, both inputs are set to VREF. Both plots indicate good noise performance as the majority of codes appear in one output bin. 0 1000 2000 3000 4000 5000 6000 7000 8000 9000 10000 2044 2045 2046 2047 2048 2049 CODE 71 Codes 9839 Codes 90 Codes TPC 15. Histogram of 10000 conversions of a DC Input with VDD = 3V TPC 16 shows the Effective Number of Bits (ENOB) versus the Reference Voltage for VDD 5V and 3.3V. Note that the AD7450 has an ENOB of greater than 8-bits typi- cally when VREF = 100mV. 6 7 8 9 10 11 12 00.5 11.5 22.5 VREF VDD = 5V Fs = 1MSPS VDD = 3.3V Fs = 833kSPS TPC 16. Change in ENOB vs Reference Voltage VDD = 5V and 3.3 V* *See Reference Section. |
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