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AD680JN Datasheet(PDF) 3 Page - Analog Devices |
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AD680JN Datasheet(HTML) 3 Page - Analog Devices |
3 / 8 page AD680 REV. C –3– THEORY OF OPERATION Bandgap references are the high performance solution for low supply voltage operation. A typical precision bandgap will con- sist of a reference core and buffer amplifier. Based on a new, patented bandgap reference design (Figure 2), the AD680 merges the amplifier and the core bandgap function to produce a compact, complete precision reference. Central to the device is a high gain amplifier with an intentionally large Proportional To Absolute Temperature (PTAT) input offset. This offset is controlled by the area ratio of the amplifier input pair, Q1 and Q2, and is developed across resistor R1. Transistor Q12’s base emitter voltage has a Complementary To Absolute Temperature (CTAT) characteristic. Resistor R2 and the parallel combina- tion of R3 and R4 “multiply” the PTAT voltage across R1. Trimming resistors R3 and R4 to the proper ratio produces a temperature invariant 2.5 V at the output. The result is an accurate, stable output voltage accomplished with a minimum number of components. Q10 R5 TEMP GND Q6 Q2 Q9 Q3 Q1 Q8 Q4 Q5 Q11 R1 R2 R4 R3 Q7 C1 R6 R7 8x 1x Q12 V OUT +VIN Figure 2. AD680 Schematic Diagram An additional feature with this approach is the ability to mini- mize the noise while maintaining very low overall power dissipation for the entire circuit. Frequently it is difficult to independently control the dominant noise sources for bandgap references: bandgap transistor noise and resistor thermal noise. By properly choosing the operating currents of Q1 and Q2 and separately sizing R1, low wideband noise is realized while main- taining 1 mW typical power dissipation. ABSOLUTE MAXIMUM RATINGS* VIN to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 V Power Dissipation (25 °C) . . . . . . . . . . . . . . . . . . . . . . 500 mW Storage Temperature . . . . . . . . . . . . . . . . . . . –65 °C to +125°C Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . . 300 °C Package Thermal Resistance θ JA (All Packages) . . . . . . . . . . . . . . . . . . . . . . . . 120 °C/W Output Protection: Output safe for indefinite short to ground and momentary short to VIN. *Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 8-Pin Plastic DIP and 8-Pin SOIC Packages 1 2 3 4 8 7 6 5 TOP VIEW (Not to Scale) AD680 TP* +V IN TEMP GND TP* TP* VOUT NC NC = NO CONNECT TP DENOTES FACTORY TEST POINT. NO CONNECTIONS SHOULD BE MADE TO THESE PINS. * TO-92 Package 3 2 1 +V IN V OUT GND AD680 BOTTOM VIEW (Not to Scale) Figure 1. Connection Diagrams ORDERING GUIDE Initial Temperature Error Coeff. Temperature Package Package Model mV ppm/ °C Range Description Option* AD680JN 10 25 0 °C to +70°C Plastic N-8 AD680JR 10 25 0 °C to +70°C SOIC SO-8 AD680JT 10 30 0 °C to +70°C TO-92 TO-92 AD680AN 5 20 –40 °C to +85°C Plastic N-8 AD680AR 5 20 –40 °C to +85°C SOIC SO-8 *N = Plastic DIP Package; SO = SOIC Package; T = TO-92 Package. |
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