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VL-MM7-2SBN Datasheet(PDF) 1 Page - List of Unclassifed Manufacturers |
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1 / 12 page Product Specifications PART NO.: VL47B5663A-F8SE REV: 1.0 Tel 949.888.2444 – 30052 Tomas, Rancho Santa Margarita, CA 92688 USA – www.virtium.com 1 General Information 2GB 256Mx64 DDR3 SDRAM NON-ECC UNBUFFERED SODIMM 204-PIN Description The VL47B5663A is a 256Mx64 DDR3 SDRAM high density SODIMM. This dual rank memory module consists of sixteen CMOS 128Mx8 bits with 8 banks DDR3 Synchronous DRAMs in BGA packages and a 2K EEPROM with thermal sensor in an 8-pin MLF package. This module is a 204-pin small-outline dual in-line memory module and is intended for mounting into an edge connector socket. Decoupling capacitors are mounted on the printed circuit board for each DDR3 SDRAM. Features Pin Description • 204-pin, small-outline dual in-line memory module (SODIMM) • Fast data transfer rate: PC3-8500 • VDD = VDDQ = 1.5V +/-0.075V • JEDEC standard 1.5V +/-0.075V I/O (SSTL_15 compatible) • VDDSPD = 3.0V to 3.6V • Eight internal component banks for concurrent operation • 8-bit pre-fetch architecture • Bi-directional differential data-strobe • Nominal and dynamic on-die termination (ODT) • ZQ calibration support • Programmable CAS# latency: 7 (DDR3-1066) • Programmable burst; length (8) • Average refresh period 7.8 us • Asynchronous reset • Fly-by topology • On board terminated command, address, and control bus • Serial presence detect (SPD) EEPROM with thermal sensor • Thermal sensor range: -40oC to +125oC (Max +/-3oC accuracy) • JEDEC pinout • Gold edge contacts • Lead-free, RoHS compliant • PCB: Height 30.00mm (1.181”), double sided component • Operating temperature (TOPER): - Commercial (0oC <= Tc <= 95oC) - Industrial (-40 oC <= Tc <= 95oC) Notes: Double refresh rate is required when 85 oC < TOPER <= 95oC. TOPER is DRAM case temperature (Tc) Pin Name Function A0~A13 Address Inputs A10/AP Address Input/ Autoprecharge A12/BC# Address Input/ Burst Chop BA0~BA2 Bank Address Inputs DQ0~DQ63 Data Input/Output DQS0~DQS7 Data Strobes DQS0#~DQS7# Data Strobes Complement DM0~DM7 Data Masks CK0, CK0#, CK1, CK1# Clock Inputs ODT0, ODT1 On-die Termination Control CKE0, CKE1 Clock Enables CS0#, CS1# Chip Selects RAS# Row Address Strobes CAS# Column Address Strobes WE# Write Enable RESET# Register and SDRAM Control VDD Voltage Supply VSS Ground SA0~SA1 SPD Address SDA SPD Data Input/Output SCL SPD Clock Input EVENT# Temperature Event Output VREFCA Reference Voltage for CA VREFDQ Reference Voltage for DQ VDDSPD SPD Voltage Supply VTT Termination Voltage NC No Connect Order Information: VL47B5663A - F8 S E - X OPERATING TEMPERATURE None: Commercial S1: Industrial screening DRAM DIE E-DIE DRAM MANUFACTURER S - SAMSUNG MODULE SPEED F8: PC3-8500 @ CL7 VL: Lead-free/RoHS DRAM component: Samsung K4B1G0846E-BCH9 |
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