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AD5334 Datasheet(PDF) 5 Page - Analog Devices

Part # AD5334
Description  2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5334 Datasheet(HTML) 5 Page - Analog Devices

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REV. 0
AD5330/AD5331/AD5340/AD5341
–5–
AD5330 FUNCTIONAL BLOCK DIAGRAM
BUFFER
8-BIT
DAC
DAC
REGISTER
INPUT
REGISTER
INTER-
FACE
LOGIC
POWER-DOWN
LOGIC
BUF
GAIN
DB7
DB0
..
CS
WR
CLR
LDAC
VREF
VDD
VOUT
PD
GND
AD5330
POWER-ON
RESET
RESET
AD5330 PIN FUNCTION DESCRIPTIONS
Pin
No.
Mnemonic
Function
1
BUF
Buffer Control Pin. This pin controls whether the reference input to the DAC is buffered or unbuffered.
2
NC
No Connect.
3VREF
Reference Input.
4VOUT
Output of DAC. Buffered output with rail-to-rail operation.
5
GND
Ground reference point for all circuitry on the part.
6
CS
Active Low Chip Select Input. This is used in conjunction with
WR to write data to the parallel interface.
7
WR
Active Low Write Input. This is used in conjunction with
CS to write data to the parallel interface.
8
GAIN
Gain Control Pin. This controls whether the output range from the DAC is 0–VREF or 0–2 VREF.
9
CLR
Asynchronous active low control input that clears all input registers and DAC registers to zero.
10
LDAC
Active low control input that updates the DAC registers with the contents of the input registers.
11
PD
Power-Down Pin. This active low control pin puts the DAC into power-down mode.
12
VDD
Power Supply Input. These parts can operate from 2.5 V to 5.5 V and the supply should be decoupled
with a 10
µF capacitor in parallel with a 0.1 µF capacitor to GND.
13–20
DB0–DB7
Eight Parallel Data Inputs. DB7 is the MSB of these eight bits.
AD5330 PIN CONFIGURATION
TOP VIEW
(Not to Scale)
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
AD5330
LDAC
GAIN
WR
CS
GND
BUF
VREF
VOUT
PD
VDD
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
8-BIT
CLR
NC = NO CONNECT
NC


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