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A8521 Datasheet(PDF) 2 Page - Allegro MicroSystems |
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A8521 Datasheet(HTML) 2 Page - Allegro MicroSystems |
2 / 35 page Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8521 2 Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com Absolute Maximum Ratings* Characteristic Symbol Notes Rating Unit LEDx Pins –0.3 to 55 V OVP Pin –0.3 to 60 V VIN, VSENSE, GATE Pins VSENSE and GATE pins should not exceed VIN by more than 0.4 V –0.3 to 40 V SW Pin Continuous –0.6 to 62 V t < 50 ns –1.0 V ¯F¯¯A¯¯¯U¯¯L¯¯T¯ Pin -0.3 to 40 V ISET, FSET, APWM, COMP Pins –0.3 to 5.5 V All Other Pins –0.3 to 7 V Operating Ambient Temperature TA Range K –40 to 125 ºC Maximum Junction Temperature TJ(max) 150 ºC Storage Temperature Tstg –55 to 150 ºC *Stresses beyond those listed in this table may cause permanent damage to the device. The Absolute Maximum ratings are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the Electrical Characteristics table is not implied. Exposure to Absolute Maximum-rated conditions for extended periods may affect device reliability. Selection Guide Part Number Packing* A8521KLPTR-T 4000 pieces per 13-in. reel *Contact Allegro® for additional packing options Table of Contents Specifications 2 Pin-out Diagram and Terminal List 3 Characteristic Performance 8 Functional Description 11 Enabling the IC 11 Powering up: LED pin short-to-ground check 11 Soft start function 13 Frequency selection 13 Sync 14 LED current setting and LED dimming 15 PWM dimming 15 APWM pin 16 Analog dimming 18 Description (continued) The A8521 is provided in a 20-pin TSSOP package (suffix LP) with an exposed pad for enhanced thermal dissipation. It is lead (Pb) free, with 100% matte tin lead frame plating. Overvoltage protection 19 Boost switch overcurrent protection 21 Input overcurrent protection and disconnect switch 22 Setting the current sense resistor 23 Input UVLO 23 VDD 23 Shutdown 23 Fault protection during operation 24 Application Information 26 Design Example for Boost Configuration 26 Design Example for SEPIC Configuration 30 Package Outline Drawing 34 |
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