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AD5235BRU250 Datasheet(PDF) 6 Page - Analog Devices

Part # AD5235BRU250
Description  Nonvolatile Memory, Dual 1024 Position Digital Potentiometers
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5235BRU250 Datasheet(HTML) 6 Page - Analog Devices

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PRELIMINARY TECHNICAL DATA
Nonvolatile Memory Digital Potentiometers
AD5235
REV PrD 6 NOV, 2000
6
Information contained in this Product Concept data sheet describes a product in the early definition stage. There is no guarantee that the
information contained here will become a final product in its present form. For latest information contact Walt Heinzer/Analog Devices, Santa Clara,
CA. TEL(408)562-7254; FAX (408)727-1550; walt.heinzer@analog.com
Table 2. AD5235 Instruction/Operation Truth Table
Inst
No.
Instruction Byte 1
B15 •••••••••••••••• B8
Data Byte 1
B15 •••• B8
Data Byte 0
B7 ••• B0
Operation
C3 C2 C1 C0 A3 A2 A1 A0
X ••• D9 D8
D7 ••• D0
0
0
0
0
0
X
X
X
X
X ••• X
X
X
••• X
NOP: Do nothing
1
0
0
0
1
<< ADDR >>
X ••• X
X
X
••• X
Write contents of EEMEM(ADDR) to RDAC(ADDR)
Register
2
0
0
1
0
<< ADDR >>
X ••• X
X
X
••• X
SAVE WIPER SETTING: Write contents of
RDAC(ADDR) to EEMEM(ADDR)
3
0
0
1
1
<< ADDR >>
X ••• D9 D8
D7 ••• D0
Write contents of Serial Register Data Byte 0 & 1 to
EEMEM(ADDR)
4
0
1
0
0
<< ADDR >>
X ••• X
X
X
••• X
DEC 6dB: Right Shift contents of RDAC(ADDR) ,
LSB rolls over to MSB position
5
0
1
0
1
X
X
X
X
X ••• X
X
X
••• X
DEC All 6dB: Right Shift contents of all RDAC
Registers, LSB rolls over to MSB position
6
0
1
1
0
<< ADDR >>
X ••• X
X
X
••• X
Decrement contents of RDAC(ADDR) by One, does
not rollover at zero-scale
7
0
1
1
1
X
X
X
X
X ••• X
X
X
••• X
Decrement contents of all RDAC Registers by One,
does not rollover at zero-scale
8
1
0
0
0
0
0
0
0
X ••• X
X
X
••• X
RESET: Load all RDACs with their corresponding
EEMEM previously-saved values
9
1
0
0
1
<< ADDR >>
X ••• X
X
X
••• X
Write contents of EEMEM(ADDR) to Serial Register
Data Byte 0 & 1
10
1
0
1
0
<< ADDR >>
X ••• X
X
X
••• X
Write contents of RDAC(ADDR) to Serial Register
Data Byte 0 & 1
11
1
0
1
1
<< ADDR >>
X ••• D9 D8
D7 ••• D0
Write contents of Serial Register Data Byte 0 &1 to
RDAC(ADDR)
12
1
1
0
0
<< ADDR >>
X ••• X
X
X
••• X
INC 6dB: Left Shift contents of RDAC(ADDR), stops
at all 'Ones'.
13
1
1
0
1
X
X
X
X
X ••• X
X
X
••• X
INC All 6dB: Right Shift contents of all RDAC
Registers, stops at all 'Ones'.
14
1
1
1
0
<< ADDR >>
X ••• X
X
X
••• X
Increment contents of RDAC(ADDR) by One, does
not rollover at full-scale stops at all 'Ones'.
15
1
1
1
1
X
X
X
X
X ••• X
X
X
••• X
Increment contents of all RDAC Registers by One,
does not rollover at full-scale stops at all 'Ones'.
NOTES:
1.
The SDO output shifts-out the last 24-bits of data clocked into the serial register for daisy chain operation. Exception,
following Instruction #9 or #10 the selected internal register data will be present in data byte 0 & 1. Instructions following
#9 & #10 must be a full 24-bit data word to completely clock out the contents of the serial register.
2.
The RDAC register is a volatile scratch pad register that is refreshed at power ON from the corresponding non-volatile
EEMEM register.
3.
The increment, decrement and shift commands ignore the contents of the shift register Data Byte 0.
4.
Execution of the Operation column noted in the table takes place when the
CS strobe returns to logic high.
.


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