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DRV8800 Datasheet(PDF) 6 Page - Texas Instruments |
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DRV8800 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 27 page Charge Pump nFAULT PHASE GND nSLEEP ENABLE OUT SENSE VCP GND CP2 CP1 OUT VBB VBB 3.3K .22 uf .1 uf .1 uf 100 uf .1 uf VREG MODE Low-Side Gate Supply Control Logic Motor lead Protection Bias Supply PAD VDD 3.3K VBB OUT+ OUT- SENSE UVLO STB STG TSD Optional + - DRV8800 DRV8801 SLVS855F – JULY 2008 – REVISED JANUARY 2012 www.ti.com Figure 3. DRV8800 FUNCTIONAL BLOCK DIAGRAM 6 Copyright © 2008–2012, Texas Instruments Incorporated |
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