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AD1852JRS Datasheet(PDF) 14 Page - Analog Devices

Part No. AD1852JRS
Description  Stereo, 24-Bit, 192 kHz Multibit DAC
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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AD1852
–14–
REV. 0
Figure 27. AD1852 DAC, Output Buffers, and LP Filters
U1
AD1852JRS
96/
48
192/
48
NC
SDATA
LRCLK
SCLK
MCLK
IDPM0
IDPM1
DEEMP
MUTE
CLATCH
CCLK
CDATA
ZEROR
ZEROL
RESET
DGND
AGND
OUTL+
OUTL–
OUTR+
OUTR–
FILTB
AVDD
DVDD
C9
220pF
NP0
R9
1.96k
R11
1.96k
C10
220pF
NP0
R16
1.87k
R10
1.96k
R20
200
J11
LEFT
OUT
C15
10nF
NP0
U3B
SSM2135
R8
1.96k
C14
1nF
NP0
R17
1.87k
C13
1nF
NP0
C11
220pF
NP0
R13
1.96k
R15
1.96k
C12
220pF
NP0
R18
1.87k
R14
1.96k
R21
200
J21
RIGHT
OUT
C18
10nF
NP0
U3A
SSM2135
R12
1.96k
C17
1nF
NP0
R19
1.87k
C16
1nF
NP0
C5
100nF
+AVCC
–AVCC
C6
100nF
3RD ORDER LP BESSEL FILTER
CORNER FREQUENCY: 75kHz
GROUP DELAY: ~3.5 s
CLATCH
CCLK
CDATA
ZR
ZL
RESET
U2A
HC04
U2B
HC04
AGND
FB1
600Z
FILTR
C8
10 F
C1
100nF
C7
10 F
CR1
ZERO
LEFT
C4
100nF
CR2
ZERO
RIGHT
R6
221
R7
221
1
3
2
4
C3
100nF
DVDD
C2
100nF
AVDD
MUTE
DEEMP
SCLK
MCLK
SDATA
LRCLK
R4
10k
R5
10k
DVDD
I/F
MODE
JP21
I/F MODE IDPM1 IDPM0
RJ, 16-BIT
0
0
I2S0
1
RJ, 20-BIT
1
0
RJ, 24-BIT
1
1
MCLK/SR SELECT
SELECT
RATE 2xMCLK
384/
256
96/
48
MCLK
SPDIF
44.1
0
0
0
11,2896
DIRECT
48.0
0
0
0
11,2880
DIRECT
96.0
0
0
1
12,2880
DGND
JP11
MCLK/SR SEL
R3
10k
R2
10k
R1
10k
DVDD
AD1852 STEREO DAC
OUTPUT BUFFERS & LP FILTERS
ZL
ZR




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