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SX1231HIMLTRT Datasheet(PDF) 2 Page - Semtech Corporation

Part # SX1231HIMLTRT
Description  Low Power Integrated UHF Transceiver with On-Chip 20dBm PA
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Manufacturer  SEMTECH [Semtech Corporation]
Direct Link  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

SX1231HIMLTRT Datasheet(HTML) 2 Page - Semtech Corporation

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SX1231H
ADVANCED COMMUNICATIONS & SENSING
DATASHEET
Rev 1 - Oct 2011
Table of Contents
Page
1.
General Description ................................................................................................................................................ 8
1.1.
Simplified Block Diagram ................................................................................................................................ 8
1.2.
Pin and Marking Diagram................................................................................................................................ 9
1.3.
Pin Description .............................................................................................................................................. 10
2.
Electrical Characteristics....................................................................................................................................... 11
2.1.
ESD Notice.................................................................................................................................................... 11
2.2.
Absolute Maximum Ratings .......................................................................................................................... 11
2.3.
Operating Range........................................................................................................................................... 11
2.4.
Chip Specification ......................................................................................................................................... 12
2.4.1. Power Consumption ................................................................................................................................. 12
2.4.2. Frequency Synthesis ................................................................................................................................ 12
2.4.3. Receiver ................................................................................................................................................... 13
2.4.4. Transmitter ............................................................................................................................................... 14
2.4.5. Digital Specification ...................................................................................................................................15
3.
Chip Description.................................................................................................................................................... 16
3.1.
Power Supply Strategy.................................................................................................................................. 16
3.2.
Frequency Synthesis..................................................................................................................................... 16
3.2.1. Reference Oscillator ................................................................................................................................. 16
3.2.2. CLKOUT Output ........................................................................................................................................17
3.2.3. PLL Architecture ....................................................................................................................................... 17
3.2.4. Lock Time .................................................................................................................................................. 18
3.2.5. Lock Detect Indicator................................................................................................................................ 18
3.3.
Transmitter Description ................................................................................................................................. 19
3.3.1. Architecture Description ........................................................................................................................... 19
3.3.2. Bit Rate Setting ........................................................................................................................................ 19
3.3.3. FSK Modulation........................................................................................................................................ 20
3.3.4. OOK Modulation ....................................................................................................................................... 20
3.3.5. Modulation Shaping.................................................................................................................................. 21
3.3.6. Power Amplifiers ...................................................................................................................................... 21
3.3.7. High Power Settings ..................................................................................................................................22
3.3.8. Output Power Summary ........................................................................................................................... 22
3.3.9. Over Current Protection ........................................................................................................................... 22
3.4.
Receiver Description ..................................................................................................................................... 23
3.4.1. Block Diagram .......................................................................................................................................... 23
3.4.2. LNA - Single to Differential Buffer ............................................................................................................ 23
3.4.3. Automatic Gain Control ............................................................................................................................ 24
3.4.4. Continuous-Time DAGC........................................................................................................................... 25
3.4.5. Quadrature Mixer - ADCs - Decimators.................................................................................................... 26
3.4.6. Channel Filter ........................................................................................................................................... 26
3.4.7. DC Cancellation ....................................................................................................................................... 27


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