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W83877 Datasheet(PDF) 78 Page - Winbond |
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W83877 Datasheet(HTML) 78 Page - Winbond |
78 / 125 page W83877F - 78 - 1 Puts the FDC in power-down mode. IDEPWD (Bit 2): This bit controls the power of the IDE. 0 Power is supplied to the IDE. (default) 1 Puts the IDE in power-down mode. FDCTRI (Bit 1): This bit enables or disables the tri-state outputs of the FDC in power-down mode. 0 The output pins of the FDC will not be tri-stated when FDC is in power-down mode. 1 The output pins of the FDC will be tri-stated when FDC is in power-down mode. IDETRI (BIt 0): This bit enables or disables the tri-state outputs of the IDE in power-down mode. 0 The output pins of the IDE will not be tri-stated when IDE is in power-down mode. 1 The output pins of the IDE will be tri-stated when IDE is in power-down mode. 8.2.8 Configuration Register 7 (CR7), default = 00H When the device is in Extended Function mode and EFIR is 07H, the CR7 register can be accessed through EFDR. The bit definitions are as follows: 7 6 5 4 3 2 1 0 FDD A type 0 FDD A type 1 FDD B type 0 FDD B type 1 FDD C type 0 FDD C type 1 FDD D type 0 FDD D type 1 FDD A type 1, 0 (Bit 1, 0): These two bits select the type of FDD A. 00 Selects normal mode. When RWC = 0, the data transfer rate is 250 Kb/s. When RWC = 1, the data transfer rate is 500 Kb/s. Three mode FDD select (EN3MODE = 1): 01 RWC = 0, selects 1.2 MB high-density FDD. 10 RWC = 1, selects 1.44 MB high-density FDD. 11 Don't care RWC , selects 720 KB double-density FDD. FDD B type 1, 0 (Bit 3, 2): |
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Similar Description - W83877 |
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