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W29EE011P90B Datasheet(PDF) 11 Page - Winbond |
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W29EE011P90B Datasheet(HTML) 11 Page - Winbond |
11 / 20 page W29EE011 Publication Release Date: July 1999 - 11 - Revision A12 Read Cycle Timing Parameters (VCC = 5.0V ±10%, VCC = 5.0 ±5% for 70 nS, VSS = 0V, TA = 0 to 70° C) PARAMETER SYM. W29EE011-90 W29EE011-15 UNIT MIN. MAX. MIN. MAX. Read Cycle Time TRC 90 - 150 - nS Chip Enable Access Time TCE - 90 - 150 nS Address Access Time TAA - 90 - 150 nS Output Enable Access Time TOE - 45 - 70 nS CE Low to Active Output TCLZ 0 - 0 - nS OE Low to Active Output TOLZ 0 - 0 - nS CE High to High-Z Output TCHZ - 45 - 45 nS OE High to High-Z Output TOHZ - 45 - 45 nS Output Hold from Address Change TOH 0 - 0 - nS Byte/Page-write Cycle Timing Parameters PARAMETER SYMBOL MIN. TYP. MAX. UNIT Write Cycle (Erase and Program) TWC - - 10 mS Address Setup Time TAS 0 - - nS Address Hold Time TAH 50 - - nS WE and CE Setup Time TCS 0 - - nS WE and CE Hold Time TCH 0 - - nS OE High Setup Time TOES 10 - - nS OE High Hold Time TOEH 10 - - nS CE Pulse Width TCP 70 - - nS WE Pulse Width TWP 70 - - nS WE High Width TWPH 150 - - nS Data Setup Time TDS 50 - - nS Data Hold Time TDH 10 - - nS Byte Load Cycle Time TBLC 0.22 - 200 µS Byte Load Cycle Time-out TBLCO 300 - - µS Note: All AC timing signals observe the following guidelines for determining setup and hold times: (a) High level signal's reference level is VIH and (b) low level signal's reference level is VIL. |
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