W29EE011

- 4 -

Hardware Data Protection

The integrity of the data stored in the W29EE011 is also hardware protected in the following ways:

(1) Noise/Glitch Protection: A WE pulse of less than 15 nS in duration will not initiate a write cycle.

3.8V.

(3) Write Inhibit Mode: Forcing OE low, CE high, or WE high will inhibit the write operation. This

prevents inadvertent writes during power-up or power-down periods.

The W29EE011 includes a data polling feature to indicate the end of a programming cycle. When the

during the page/byte-load cycle will receive the complement of the true data. Once the programming

In addition to data polling, the W29EE011 provides another method for determining the end of a

produce alternating 0's and 1's. When the programming cycle is completed, this toggling between 0's

and 1's will stop. The device is then ready for the next operation.

5-Volt-only Software Chip Erase

The chip-erase mode can be initiated by a six-byte command sequence. After the command loading

cycles, the device enters the internal chip erase mode, which is automatically timed and will be

completed in 50 mS. The host system is not required to provide any control or timing during this

operation.

Product Identification

The product ID operation outputs the manufacturer code and device code. Programming equipment

automatically matches the device with its proper erase and programming algorithms.

The manufacturer and device codes can be accessed by software or hardware operation. In the

software access mode, a six-byte command sequence can be used to access the product ID. A read

from address 0000H outputs the manufacturer code (DAh). A read from address 0001H outputs the

device code (C1h). The product ID operation can be terminated by a three-byte command sequence.

In the hardware access mode, access to the product ID is activated by forcing CE and OE low, WE

high, and raising A9 to 12 volts.