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RT8223PZQW Datasheet(PDF) 3 Page - Richtek Technology Corporation |
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RT8223PZQW Datasheet(HTML) 3 Page - Richtek Technology Corporation |
3 / 23 page RT8223P 3 DS8223P-01 June 2011 www.richtek.com Pin No. Pin Name Pin Function 9 BOOT2 Boost Flying Capacitor Connection for SMPS2. Connect to an external capacitor according to the typical application circuits. 10 UGATE2 Upper Gate Driver Output for SMPS2. UGATE2 swings between PHASE2 and BOOT2. 11 PHASE2 Switch Node for SMPS2. PHASE2 is the internal lower supply rail for the UGATE2 high side gate driver. PHASE2 is also the current-sense input for the SMPS2. 12 LGATE2 Lower Gate Driver Output for SMPS2. LGATE2 swings between GND and VREG5. 13 EN Master Enable Input. The REF/VREG5/VREG3 are enabled if it is within logic high level and disabled if it is less than the logic low level. 14 SKIPSEL Operation Mode Selectable Input. Connect to VREG5 or VREG3 : Ultrasonic Mode Connect to REF : PWM Mode Connect to GND : DEM Mode 16 VIN Supply Input for 5V/3.3V LDO and Feed Forward On-Time circuitry. 17 VREG5 5V Linear Regulator Output. VREG5 is also the supply voltage for the lower gate driver and analog supply voltage for the device. 18 ENC SMPS Enable Input. Pull up to VREG3 or VREG5 to turn on both switch channels. Short to GND to shutdown them. 19 LGATE1 Lower Gate Driver Output for SMPS1. LGATE1 swings between GND and VREG5. 20 PHASE1 Switch Node for SMPS1. PHASE1 is the internal lower supply rail for the UGATE1 high side gate driver. PHASE1 is also the current-sense input for the SMPS1. 21 UGATE1 Upper Gate Driver Output for SMPS1. UGATE1 swings between PHASE1 and BOOT1. 22 BOOT1 Boost Flying Capacitor Connection for SMPS1. Connect to an external capacitor according to the typical application circuits. 23 PGOOD Power Good Output for Channel 1 and Channel 2. (Logical AND). 24 VOUT1 Bypass Pin for SMPS1. Connect to the SMPS1 output to bypass efficient power for VREG5 pin. VOUT1 is also for the SMPS1 output soft-discharge. 15, 25 (Exposed Pad) GND Ground for SMPS Controller. The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation. |
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